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Patent # Description
US-9,374,131 Frequency hopping in a wireless communication network
Techniques for performing frequency hopping in a wireless network are described. In an aspect, frequency hopping may be performed based on both cell identity...
US-9,374,130 Method and apparatus for triggering a ranked transmission
A method and apparatus are provided for providing improved spectrum efficiency by triggering a ranked transmission. In this regard, a method is provided that...
US-9,374,129 Integrated circuit for controlling selection of random access preamble sequence
A sequence allocating method and apparatus wherein in a system where a plurality of different Zadoff-Chu sequences or GCL sequences are allocated to a single...
US-9,374,128 Apparatus for encoding/decoding multichannel signal and method thereof
Provided is an encoding/decoding apparatus and method of multi-channel signals. The encoding apparatus and method of multi-channel signals may encode phase...
US-9,374,127 Balancing method of tunable duplexer
An apparatus comprises a tunable duplexer configured to output a transmission signal to be wirelessly transmitted from the apparatus at a transmission...
US-9,374,126 Multiband on ground antenna with a dual radiator arrangement
An antenna arrangement includes a switch having an open state and a closed state, a first antenna that operates as a first active driven element in a first...
US-9,374,125 Methods and devices for overcoming insertion loss in RF systems
Methods and devices are described for overcoming insertion loss notches in RF systems. In one case programmable impedances are used to move an insertion loss...
US-9,374,124 Apparatus and methods for biasing radio frequency switches
Apparatus and methods for radio frequency (RF) switches are provided herein. In certain implementations, an RF switching circuit includes an adaptive switch...
US-9,374,123 Device, module and circuit assembly for wireless communications, and configured for interference suppression...
The present invention relates to a circuit assembly which comprises an antenna path (A1), which can be connected to a first antenna (ANT1), a transmission path...
US-9,374,122 Integrated on-chip duplexer for simultaneous wireless transmission
An electrical balancing network combined with coupled inductors (EBN) replaces a transmit/receive switch was used for isolation for time division duplexing...
US-9,374,121 Transceiver with super-heterodyne and zero intermediate frequency (ZIF) topologies
Transceivers implemented with a combination of super-heterodyne and zero intermediate frequency (ZIF) topologies are disclosed. In an exemplary design, an...
US-9,374,120 Medication pocket and cellular phone case assembly
A medication pocket and cellular phone case assembly includes a housing that has a back wall having a front side, a back side and a perimeter edge. A perimeter...
US-9,374,119 Communication device
A communication device is provided. The communication device includes an antenna unit, a sensing unit and a radio frequency unit. The antenna unit is configured...
US-9,374,118 Drawer-type SIM card structure and electronic product
A drawer-type SIM card structure and an electronic product is provided, and the drawer-type SIM card structure is mounted in the interior of a containing cavity...
US-9,374,117 Stereo decoding system
A system for decoding a stereo multiplex signal, including one or more devices operable to convert the stereo multiplex signal into a sum signal (L+R) and a...
US-9,374,116 Software defined radio technique
A modulated signal is demodulated to obtain a modulation signal. The modulated signal is contained within an input signal. A periodic time segment sequence is...
US-9,374,115 Method, base station and apparatus in a base station for reducing intermodulation distortion
A method in a base station is provided for reducing distortion of an uplink signal received in a receiver part (20) of the base station, said distortion being...
US-9,374,114 Receiver apparatus with blocker detection path parallel with receiver path and associated blocker detection method
A receiver apparatus includes a receiver path and a blocker detection path. The receiver path includes a down-converting stage. The blocker detection path...
US-9,374,113 Method and apparatus for adjusting the timing of radio antenna tuning
A system that incorporates teachings of the present disclosure may include, for example, determining, by a controller of a mobile communication device, a phase...
US-9,374,112 Capture selection for digital pre-distortion adaptation and capture concatenation for frequency hopping...
A digital pre-distortion component includes: a first capturing component that captures a first sample set of data; a first generating component that generates a...
US-9,374,111 Multi-stage charge re-use analog circuits
A linear transform can be performed using a passive analog multi-stage charge re-use linear transform circuit. The passive analog multi-stage charge re-use...
US-9,374,110 Multimode decoder implementation method and device
Disclosed are a multimode decoder method and device. The method includes: interleaving pre-stored to-be-decoded data to obtain an interleaving address; and...
US-9,374,109 QPP interleaver/DE-interleaver for turbo codes
A quadratic permutation polynomial (QPP) interleaver is described for turbo coding and decoding. The QPP interleaver has the form: ...
US-9,374,108 Convolution-encoded hyper-speed channel with robust trellis error-correction
A method, system, and computer program product for performing robust, parallel data transfer by a processor device. Data is segmented into k-bit segments, where...
US-9,374,107 Time shared protograph LDPC decoder
An LDPC decoder includes a check node processor. The check node processor is configured to implement an n-degree check node, where n is a predetermined number....
US-9,374,106 Efficient context save/restore during hardware decompression of DEFLATE encoded data
A hardware accelerator receives a request to decompress a data stream that includes multiple deflate blocks and multiple deflate elements compressed according...
US-9,374,105 Converting time-encoded signal into analog output
A converter may generate an analog output that is representative of a time-encoded signal. The circuit may include an input port receiving the time-encoded...
US-9,374,104 Sample hold circuit, A/D converter, calibration method of the sample hold circuit, and circuit
There is provided a pipelined A/D converter in which plural stages Stage 1 to Stage N each including an MDAC (i.e., Multiplying DA Converter) are connected. The...
US-9,374,103 Digital-to-analog converter system
In some embodiments, a digital-to-analog converter (DAC) system includes an output segment, a main branch, first and second edge segments, and a sub-segment....
US-9,374,102 Dynamic analog to digital converter (ADC) triggering
A method and apparatus are configured to receive at a control input of an analog to digital converter (ADC) circuit, from a control output of a control circuit,...
US-9,374,101 Sensor device including high-resolution analog to digital converter
Provided is a sensor device including: a sensor unit converting a voltage of a periodically switched capacitor into a pulse signal by referring to a clock...
US-9,374,100 Low power LO distribution using a frequency-multiplying subharmonically injection-locked oscillator
A local oscillator communicates a signal of relatively low frequency across an integrated circuit to the location of a mixer. Near the mixer, a...
US-9,374,099 Oscillating signal generator, phase-lock loop circuit using the oscillating signal generator and control method...
An oscillating signal generator includes: a controllable oscillator arranged to output an oscillating signal according to a control signal and a band adjusting...
US-9,374,098 Transmitter serializer latency trim
A system and method for transmitting includes a plurality of multiplexers each configured to combine a pseudo random bit sequence (PRBS) with at least one input...
US-9,374,097 Data processor, solid-state imaging device, imaging device, and electronic apparatus
A data processor including: a reference signal generator to generate a reference signal, used to convert a level of an analog processing signal into digital...
US-9,374,096 Semiconductor apparatus and semiconductor system including the same, and method of operating the same
A semiconductor apparatus includes a clock division block suitable for generating a first internal clock and a second internal clock having a first phase...
US-9,374,095 Counter circuit and semiconductor device including the same
A counter circuit includes a lower count signal generation unit suitable for generating a lower bit, an upper count signal generation unit suitable for...
US-9,374,094 3D field programmable gate array system with reset manufacture and method of manufacture thereof
A 3D field programmable gate array (FPGA) system, and method of manufacture therefor, includes: a field programmable gate array (FPGA) die having a configurable...
US-9,374,093 Capacitively coupled input buffer
A buffer circuit comprising a capacitor, the capacitor comprising a first terminal and a second terminal, an input signal being coupled to the first terminal; a...
US-9,374,092 Internal voltage compensation circuit
An internal voltage compensation circuit is provided which includes a power up signal generator configured to generate a power up signal, a select signal...
US-9,374,091 Input circuit arrangement, output circuit arrangement, and system having an input circuit arrangement and an...
The invention relates to an input circuit arrangement (11), which is designed for operation either in a first or a second operating mode (A, B) and comprises a...
US-9,374,090 Circuit arrangement and method of operating the same
A circuit arrangement may be provided including a level shifting stage configured to be coupled to a first reference voltage and a second reference voltage. The...
US-9,374,089 Isolation cell
An embodiment of the invention provides an isolation cell for isolating a second power domain from a first power domain. The isolation cell includes an input...
US-9,374,088 Impedance calibration apparatus of semiconductor integrated circuit
An impedance calibration apparatus of a semiconductor integrated circuit includes: a D/A conversion unit configured to receive a code and generate an analog...
US-9,374,087 Apparatus and method for processing virtual world
A virtual world processing apparatus and method. Information on sensor capability is converted to binary data and then transmitted, or converted to eXtensible...
US-9,374,086 Switch circuit and method of operating the switch circuit
A method of electrically coupling a first node and a second node of a switch cell includes biasing the second node and a bias node of the switch cell at a...
US-9,374,085 Bidirectional two-base bipolar junction transistor operation, circuits, and systems with double base short at...
Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching....
US-9,374,084 Bidirectional two-base bipolar junction transistor operation, circuits, and systems with diode-mode turn-on
Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching....
US-9,374,083 Switching current control circuit, LED dimmer system, and LED illumination device
The switching current control circuit includes a switching pulse supply circuit, a comparator circuit, and analog circuit unit, a digital circuit unit, etc. The...
US-9,374,082 Clock control device of controlling clock stable time based on operational condition, semiconductor device...
A clock control device and method are provided. The clock control device includes a stable time controller which receives an operational condition and generates...
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