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Patent # Description
US-9,373,729 Solar cell and method of manufacturing the same
Provided is a solar cell. The solar cell includes: a substrate including through lines opposing to each other; a semiconductor layer on a top side of the...
US-9,373,728 Trench MOS PN junction diode structure
A trench MOS PN junction diode structure includes a first conductive type substrate, a plurality of trenches defined on a face of the first conductive type...
US-9,373,727 Semiconductor diode
A semiconductor diode includes a semiconductor substrate having a lightly doped region with a first conductivity type therein. A first heavily doped region with...
US-9,373,724 Method of driving transistor and device including transistor driven by the method
Disclosed is a method of driving a transistor including a semiconductor layer, a first insulating layer, a second insulating layer, a first conductive layer,...
US-9,373,723 Semiconductor device and manufacturing method of the same
The present invention provides a semiconductor device which suppresses a short circuit and a leakage current between a semiconductor film and a gate electrode...
US-9,373,722 Semiconductor structure and method for manufacturing the same
The present invention provides a semiconductor structure comprising: a semiconductor base located on an insulating layer, wherein the insulating layer is...
US-9,373,721 Methods of forming a non-planar ultra-thin body semiconductor device and the resulting devices
One device disclosed includes a gate structure positioned around a perimeter surface of the fin, a layer of channel semiconductor material having an axial...
US-9,373,720 Three-dimensional transistor with improved channel mobility
The present invention relates to a semiconductor structure comprising at least a first and a second three-dimensional transistor, wherein the first transistor...
US-9,373,719 Semiconductor device
A semiconductor device is provided. The semiconductor device includes an active fin region, at least a gate strip, and a dummy fin region. The active fin region...
US-9,373,718 Etching method for forming grooves in Si-substrate and fin field-effect transistor
An etching method adapted to forming grooves in Si-substrate and FinFET transistor manufactured thereof are provided. The etching method includes providing a...
US-9,373,717 Stress-inducing structures, methods, and materials
Stress-inducing structures, methods, and materials are disclosed. In one embodiment, an isolation region includes an insulating material in a lower portion of a...
US-9,373,716 Impact ionization devices, and methods of forming impact ionization devices
Impact ionization devices including vertical and recessed impact ionization metal oxide semiconductor field effect transistor (MOSFET) devices and methods of...
US-9,373,715 Semiconductor devices including vertical memory cells and methods of forming same
A semiconductor device may include a memory array including vertical memory cells connected to a digit line, word lines, and a body connection line. A row or...
US-9,373,714 Extended-drain MOS transistor in a thin film on insulator
An extended-drain transistor is formed in a semiconductor layer arranged on one side of an insulating layer with a semiconductor region being arranged on the...
US-9,373,713 Silicon carbide semiconductor device and method of manufacture thereof
A silicon carbide semiconductor device and method of manufacture thereof is made by providing a channel control zone which has impurity concentration...
US-9,373,712 Transistor and method of manufacturing the same
A transistor includes source region and drain regions, a channel region, a drift region, a gate, a dummy gate, a gate dielectric layer and an interconnection...
US-9,373,711 Semiconductor device
Disclosed is a semiconductor device including two oxide semiconductor layers, where one of the oxide semiconductor layers has an n-doped region while the other...
US-9,373,710 Insulated gate bipolar transistor
A semiconductor component is described herein. In accordance with one example of the invention, the semiconductor component includes a semiconductor body, which...
US-9,373,709 All-electric spin field effect transistor
An all-electric spin field effect transistor is disclosed, which includes an injection node, injecting an electron in a first spin direction; a detection node,...
US-9,373,708 Method for manufacturing semiconductor device
To establish a processing technique in manufacture of a semiconductor device including an In--Sn--Zn--O-based semiconductor. An In--Sn--Zn--O-based...
US-9,373,707 Manufacturing method of semiconductor device with steps of heat treatment in nitrogen containing atmosphere,...
A semiconductor device using an oxide semiconductor, with stable electric characteristics and high reliability. In a process for manufacturing a bottom-gate...
US-9,373,706 Methods of forming semiconductor devices, including forming a semiconductor material on a fin, and related...
Methods of forming a semiconductor device are provided. A method of forming a semiconductor device includes forming a semiconductor layer on a fin, where the...
US-9,373,705 Manufacturing method of a fin-shaped field effect transistor and a device thereof
The present invention provides a manufacturing method of a fin-shaped field effect transistor (FinFET), comprises the following steps. Firstly, providing a...
US-9,373,704 Multiple-gate semiconductor device and method
A system and method for manufacturing multiple-gate semiconductor devices is disclosed. An embodiment comprises multiple fins, wherein intra-fin isolation...
US-9,373,703 Semiconductor device and method of manufacturing the same
A method of manufacturing a semiconductor device includes forming an active pattern protruding from a semiconductor substrate, forming a dummy gate pattern...
US-9,373,702 Carbon-doped cap for a raised active semiconductor region
After formation of a disposable gate structure, a raised active semiconductor region includes a vertical stack, from bottom to top, of an ...
US-9,373,701 Method for fabricating array substrate
Disclosed is a method for fabricating an array substrate, comprising: forming a pattern layer comprising a gate and a gate connection on a substrate;...
US-9,373,700 Field plate trench transistor and method for producing it
A field plate trench transistor having a semiconductor body. In one embodiment the semiconductor has a trench structure and an electrode structure embedded in...
US-9,373,699 Semiconductor devices with field plates
A III-N device is described with a III-N material layer, an insulator layer on a surface of the III-N material layer, an etch stop layer on an opposite side of...
US-9,373,698 Methods of manufacturing semiconductor devices and electronic devices
In a method of manufacturing a semiconductor device, an isolation layer pattern is formed on a substrate to define a field region covered by the isolation layer...
US-9,373,697 Spacer replacement for replacement metal gate semiconductor devices
A method comprising steps of removing a first dielectric material, including a hard mask layer and one or more spacer material layers, from a semiconductor...
US-9,373,696 Techniques to form uniform and stable silicide
In one aspect, a method of fabricating a metal silicide includes the following steps. A semiconductor material selected from the group consisting of silicon and...
US-9,373,695 Method for improving selectivity of epi process
The present disclosure provides a method of fabricating a semiconductor device that includes providing a semiconductor substrate, forming a gate structure over...
US-9,373,694 System and method for integrated circuits with cylindrical gate structures
A device and method for integrated circuits with surrounding gate structures are disclosed. The device includes a semiconductor substrate and a fin structure on...
US-9,373,693 Nonplanar III-N transistors with compositionally graded semiconductor channels
A III-N semiconductor channel is compositionally graded between a transition layer and a III-N polarization layer. In embodiments, a gate stack is deposited...
US-9,373,692 Method for forming a semiconductor device with an integrated poly-diode
A method for forming a field effect power semiconductor device includes providing a semiconductor body comprising a main horizontal surface and a conductive...
US-9,373,691 Transistor with bonded gate dielectric
A method for forming a semiconductor device includes forming a dielectric layer on a first substrate and wafer bonding the dielectric layer of the first...
US-9,373,690 Variable length multi-channel replacement metal gate including silicon hard mask
A method of forming a semiconductor device includes forming first and second semiconductor structures on a semiconductor substrate. The first semiconductor...
US-9,373,689 High electron mobility transistor and method of forming the same
A semiconductor structure includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different...
US-9,373,688 Normally-off high electron mobility transistors
A normally-off transistor includes a first region of III-V semiconductor material, a second region of III-V semiconductor material on the first region, a third...
US-9,373,687 Light emitting ceramic substrate including group-III nitride
In a semiconductor device, a YAG substrate is formed as a single-crystal substrate of any of surface orientations (100), (110), and (111). In the fabrication of...
US-9,373,686 Semiconductor device and method for manufacturing same and semiconductor substrate
According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type made of silicon carbide; and a second...
US-9,373,685 Graphene device and electronic apparatus
A graphene device and an electronic apparatus including the same are provided. According to example embodiments, the graphene device includes a transistor...
US-9,373,684 Method of manufacturing variation resistant metal-oxide-semiconductor field effect transistor (MOSFET)
Variation resistant metal-oxide-semiconductor field effect transistors (MOSFET) are manufactured using a high-K, metal-gate `channel-last` process. Between...
US-9,373,683 Thin film transistor
The thin film transistor includes a gate, a gate insulating layer, a semiconductor layer, and a source and a drain. The gate insulating layer covers the gate....
US-9,373,682 Compact guard ring structure for CMOS integrated circuits
An integrated circuit includes a guard ring structure including a guard ring with integrated well taps to reduce the silicon area required for the guard ring...
US-9,373,681 Method for fabricating capacitor of semiconductor device
A method for fabricating a capacitor of a semiconductor device includes forming a mold layer over a substrate, forming a plurality of preliminary openings by...
US-9,373,680 Integrated circuits with capacitors and methods of producing the same
Integrated circuits with MIM capacitors and methods for producing them with metal and oxide hard masks are provided. Embodiments include disposing a dielectric...
US-9,373,679 Semiconductor device comprising capacitive element
A semiconductor device production method includes forming a transition metal film, irradiating a surface of the transition metal film with a mono-silane gas to...
US-9,373,678 Non-planar capacitors with finely tuned capacitance values and methods of forming the non-planar capacitors
Disclosed are non-planar capacitors with finely tuned capacitances and methods of forming them. The capacitors each incorporate one or more semiconductor bodies...
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