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Reverse-conducting power semiconductor device
A reverse-conducting power semiconductor device with a wafer has first and second main sides which are arranged opposite and parallel to each other. The device...
Semiconductor device with insert structure at a rear side and method of
A cavity is formed in a first semiconductor layer that is formed on a semiconducting base layer. The cavity extends from a process surface of the first...
Nanowire transistor with underlayer etch stops
A nanowire device of the present description may be produced with the incorporation of at least one underlayer etch stop formed during the fabrication of at...
Semiconductor device having fin structure that includes dummy fins
A semiconductor device includes: a substrate, a fin-shaped structure on the substrate, and a dummy fin-shaped structure on the substrate and adjacent to the...
Method and apparatus for selective deposition
Methods for forming fin structures with desired materials formed on different locations of the fin structure using a selective deposition process for fin field...
Method and structure for forming dielectric isolated FinFET with improved
A semiconductor structure is provided that includes a fin structure of, from bottom to top, a semiconductor punch through stop (PTS) doping fin portion, a...
Semiconductor device having super junction metal oxide semiconductor
structure and fabrication method for the same
A semiconductor device includes: a first base layer; a drain layer disposed on the back side surface of the first base layer; a second base layer formed on the...
Monolithically integrated active snubber
A semiconductor device containing an extended drain MOS transistor with an integrated snubber formed by forming a drain drift region of the MOS transistor,...
V-shaped SiGe recess volume trim for improved device performance and
Some embodiments of the present disclosure relates to a method and a device to achieve a strained channel. A volume of a source or drain recess is controlled by...
Method of forming a selectively adjustable gate structure
The present disclosure relates to a method of forming a gate structure that can be selectively adjusted to reduce critical-dimension (CD) variations. In some...
Integrated circuits and manufacturing methods thereof
A method of forming an integrated circuit including forming a first diffusion area and a second diffusion area on a substrate, wherein the first diffusion area...
Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device is provided. The method includes forming, on a substrate, a plurality of fins extending along a first...
Manufacturing method for semiconductor device
A p.sup.+ collector layer is provided in a rear surface of a semiconductor substrate which will be an n.sup.- drift layer and an n.sup.+ field stop layer is...
Method for manufacturing semiconductor device using a gettering layer
In a method for manufacturing a reverse blocking MOS semiconductor device, a gettering polysilicon layer is formed on a rear surface of an FZ silicon substrate....
Semiconductor device and method of manufacturing the same
A semiconductor device including a graphene layer and a method of manufacturing the same are disclosed. A method in which graphene is grown on a catalyst metal...
Semiconductor device having high-K gate dielectric layer
A semiconductor device includes a substrate and a gate structure over the substrate. The gate structure includes a dielectric portion and an electrode portion...
Stratified gate dielectric stack for gate dielectric leakage reduction
A stratified gate dielectric stack includes a first high dielectric constant (high-k) gate dielectric comprising a first high-k dielectric material, a...
Semiconductor device having spacer with tapered profile
A semiconductor device is disclosed. The semiconductor device includes a substrate, a gate structure on the substrate, and a spacer adjacent to the gate...
Active device and high voltage-semiconductor device with the same
A high voltage (HV) semiconductor device is provided, comprising a substrate, a first well having a first conductive type and extending down from a surface of...
Semiconductor device having a patterned gate dielectric
In one embodiment, a semiconductor device includes an isolated trench-electrode structure. The semiconductor device is formed using a modified photolithographic...
Buried source-drain contact for integrated circuit transistor devices and
method of making same
An integrated circuit transistor is formed on a substrate. A trench in the substrate is at least partially filed with a metal material to form a source (or...
Bipolar transistor having collector with doping spike
This disclosure relates to bipolar transistors, such as heterojunction bipolar transistors, having at a doping spike in the collector. The doping spike can be...
Normally-off gallium nitride-based semiconductor devices
A method includes forming a relaxed layer in a semiconductor device. The method also includes forming a tensile layer over the relaxed layer, where the tensile...
Heterostructures for semiconductor devices and methods of forming the same
Various heterostructures and methods of forming heterostructures are disclosed. A structure includes a substrate, a template layer, a barrier layer, and a...
Semiconductor structure with contact over source/drain structure and
method for forming the same
A semiconductor structure and a method for forming the same are provided. The method includes forming a source/drain structure in a substrate and forming a...
Fast switching IGBT with embedded emitter shorting contacts and method for
Integrated circuits are presented having high voltage IGBTs with integral emitter shorts and fabrication processes using wafer bonding or gown epitaxial silicon...
Vertical gate-all-around TFET
A vertical tunneling FET (TFET) provides low-power, high-speed switching performance for transistors having critical dimensions below 7 nm. The vertical TFET...
Nanoparticles and methods of manufacturing the same
A method of manufacturing nanoparticles including: providing a metal chalcogenide complexes (MCC) hydrazine hydrate solution; providing a first organic solution...
FINFET transistor structure and method for making the same
A FINFET transistor structure includes a substrate including a fin structure. Two combined recesses embedded within the substrate, wherein each of the combined...
Shallow trench isolation integration methods and devices formed thereby
Aspects of the present invention generally relate to approaches for forming a semiconductor device such as a TSV device having a "buffer zone" or gap layer...
A FINFET structure is provided. The FINFET structure includes a substrate, a PMOS element, a NMOS element, a STI structure, and a bump structure. The substrate...
Deep trench isolation structure layout and method of forming
The embodiments described herein provide a semiconductor device layout and method that can be utilized in a wide variety of semiconductor devices. In one...
Fin liner integration under aggressive pitch
A method of forming a fin liner and the resulting device are provided. Embodiments include forming silicon (Si) fins over negative channel field-effect...
Semiconductor device with termination region having floating electrodes in
an insulating layer
A semiconductor device which can suppress the influence of the external electric charge and can be efficiently manufactured is provided. The semiconductor...
High breakdown N-type buried layer
A semiconductor device has an n-type buried layer formed by implanting antimony and/or arsenic into the p-type first epitaxial layer at a high dose and low...
High voltage device with composite structure and a starting circuit
A high voltage device with composite structure comprises a high voltage power MOS transistor HVNMOS and a JFET. The high voltage power MOS transistor HVNMOS...
Semiconductor devices including a guard ring and related semiconductor
Semiconductor devices are provided. The semiconductor devices may include a substrate and a transistor on the substrate. The semiconductor devices may include a...
Active device and semiconductor device with the same
A semiconductor device is provided, comprising a substrate; a first well having a first conductive type and extending down from a surface of the substrate; a...
The termination region includes a ring region (LNFLR). A plurality of ring-shaped P-type ring layers are regularly arranged in the ring region (LNFLR). The ring...
Junction termination structures including guard ring extensions and
methods of fabricating electronic devices...
An electronic device includes a semiconductor layer, a primary junction in the semiconductor layer, a lightly doped region surrounding the primary junction and...
Semiconductor diode and method of manufacturing a semiconductor diode
A semiconductor diode includes a semiconductor body having opposite first and second sides. A first and a second semiconductor region are consecutively arranged...
Semiconductor device structures and methods of forming semiconductor
A method of patterning a semiconductor film is described. According to an embodiment of the present invention, a hard mask material is formed on a silicon film...
Deep trench decoupling capacitor and methods of forming
Solutions for forming a silicided deep trench decoupling capacitor are disclosed. In one aspect, a method of forming a semiconductor device includes: forming an...
High voltage resistor with PIN diode isolation
Provided is a high voltage semiconductor device that includes a PIN diode structure formed in a substrate. The PIN diode includes an intrinsic region located...
Technique for fabrication of microelectronic capacitors and resistors
A sequence of semiconductor processing steps permits formation of both vertical and horizontal nanometer-scale serpentine resistors and parallel plate...
OLED display panel and manufacturing method thereof
An OLED display panel is provided which can control the problem of shedding even in high definition panels. Metal wiring 5 which conducts with an earth line of...
Display device with micro cover layer and manufacturing method for the
There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size...
Organic light-emitting diode display and manufacturing method thereof
An organic light-emitting diode (OLED) display and a manufacturing method thereof are disclosed. One inventive aspect includes a first substrate, a second...
A display unit with which lowering of long-term reliability of a transistor is decreased is provided. The display unit includes a display section having a...
One-way transparent display
A transparent emissive device is provided. The device may include one or more OLEDs having an anode, a cathode, and an organic emissive layer disposed between...