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Patent # Description
US-9,385,171 Active matrix organic light-emitting diode array substrate, manufacturing method thereof and display device...
An active matrix organic light-emitting diode array substrate, a manufacturing method thereof and a display device including the same are disclosed to improve...
US-9,385,170 Thin film transistor array panel and organic light emitting diode display including the same
A thin film transistor array panel according to an exemplary embodiment includes: a substrate; a thin film transistor positioned on the substrate; a first...
US-9,385,169 Multi-functional active matrix organic light-emitting diode display
A multi-functional active matrix display comprises a transparent front sheet, a semi-transparent layer of light emissive devices adjacent the rear side of the...
US-9,385,168 High resolution low power consumption OLED display with extended lifetime
Arrangements of pixel components that allow for full-color devices, while using emissive devices that emit at not more than two colors, and/or a limited number...
US-9,385,167 OLED display architecture
A device that may be used as a multi-color pixel is provided. The device has a first organic light emitting device, a second organic light emitting device, a...
US-9,385,166 Image sensor and image processing device
An image sensor includes a semiconductor layer, an organic photoelectric conversion portion disposed on an upper surface of the semiconductor layer and that...
US-9,385,165 Photovoltaics using concave surface column array to enhance sunlight absorption
A photovoltaic device forming a solar cell includes a first surface on a first column and a second surface on a second column, wherein the first surface is...
US-9,385,164 Method of making a resistive random access memory device with metal-doped resistive switching layer
A method for forming a resistive random access memory (RRAM) device is disclosed. The method comprises forming a first electrode, forming a resistive switching...
US-9,385,163 Addressable SiOX memory array with incorporated diodes
Various embodiments of the resistive memory cells and arrays discussed herein comprise: (1) a first electrode; (2) a second electrode; (3) resistive memory...
US-9,385,162 Programmably reversible resistive device cells using CMOS logic processes
Junction diodes fabricated in standard CMOS logic processes can be used as program selectors for reversible resistive devices, such as PCM, RRAM, CBRAM, or...
US-9,385,161 Semiconductor integrated circuit device having reservoir capacitor and method of manufacturing the same
A semiconductor integrated circuit device having a reservoir capacitor and a method of manufacturing the same are provided. A first insulating layer is formed...
US-9,385,160 Semiconductor storage device
A memory includes a semiconductor substrate. Magnetic tunnel junction elements are provided above the semiconductor substrate. Each of the magnetic tunnel...
US-9,385,159 Electronic circuitry having superconducting tunnel junctions with functional electromagnetic-responsive...
A device includes at least one superconducting tunnel junction having a junction region comprising a junction barrier material responsive to electromagnetic...
US-9,385,158 Bipolar junction transistor pixel circuit, driving method thereof, and image sensor
A bipolar junction transistor (BJT) pixel circuit, an image sensor and a driving method thereof are provided. The BJT pixel circuit includes a BJT, a...
US-9,385,157 Pixel of an image sensor, and image sensor
A pixel of an image sensor includes a photoelectric conversion region formed in a semiconductor substrate, a floating diffusion region formed in the...
US-9,385,156 Method of manufacturing a back side illuminated (BSI) image sensor
Some embodiments of the present disclosure provide a method of manufacturing a back side illuminated (BSI) image sensor. The method includes receiving a...
US-9,385,155 Photodiode array
A light receiving region includes a plurality of light detecting sections 10. The light detecting sections 10 has a second contact electrode 4A. The second...
US-9,385,154 Solid-state image sensor, driving method and electronic apparatus
There is provided a solid-state image sensor including a pixel region in which a plurality of pixels of a preset plurality of colors are arranged in a...
US-9,385,153 Image sensor device with flexible interconnect layer and related methods
An image sensor device may include an interconnect layer having an opening extending therethrough, an image sensor IC within the opening and having an image...
US-9,385,152 Solid-state image pickup device and image pickup system
The present invention relates to a solid-state image pickup device. The device includes a first substrate including a photoelectric conversion element and a...
US-9,385,151 Manufacturing method for edge illuminated type photodiode and semiconductor wafer
A manufacturing method for an edge illuminated type photodiode has: a process of forming an impurity-doped layer of a first conductivity type in each of device...
US-9,385,150 Image sensor device
An image sensor and image sensor device include: a lighting portion extending in a main scanning direction and emitting light to the object-to-be-read; a rod...
US-9,385,149 CMOS imaging device having optimized shape, and method for producing such a device by means of photocomposition
An imaging device comprises a sensor of surface area of at least 10 cm.sup.2 and comprising: an image zone produced on a single substrate and comprising a group...
US-9,385,148 Solid-state imaging device and electronic camera
A solid-state imaging device includes a second image sensor having an organic photoelectric conversion film transmitting a specific light, and a first image...
US-9,385,147 Electronic systems, thin film transistors, methods of manufacturing thin film transistors and thin film...
Thin film transistors (TFT) and methods of manufacturing the same. A TFT includes a line-shaped gate of uniform thickness. A cross-section of the gate is curved...
US-9,385,146 Rework method of array substrate for display device and array substrate formed by the method
The present invention provides a method of reworking an array substrate including a gate metal layer, a gate insulation layer (G1), a semiconductor layer, a...
US-9,385,145 Double thin film transistor structure with shared gate
A double thin film transistor includes a first semiconductor layer, a gate, a second semiconductor layer, a first insulating layer, a second insulating layer, a...
US-9,385,144 Array substrate and display device
An array substrate and a display device that comprises the array substrate are disclosed. The array substrate comprises a base substrate, a plurality of scan...
US-9,385,143 TFT array substrate, and liquid crystal display panel
An embodiment of the present invention provides a TFT array substrate, in which TFT elements and pixel electrodes being correspondingly connected with the TFT...
US-9,385,142 Liquid crystal display and manufacturing method thereof
A liquid crystal display includes: an insulation substrate, a gate line disposed on the insulation substrate, a first field generating electrode disposed on the...
US-9,385,141 Array substrate, display panel and method for manufacturing array substrate
An array substrate comprises a plurality of pixel units, and each pixel unit comprises a thin film transistor (TFT), a transparent conductive metal layer and a...
US-9,385,140 Efficient buried oxide layer interconnect scheme
An integrated circuit has a buried interconnect in the buried oxide layer connecting a body of a MOS transistor to a through-substrate via (TSV). The buried...
US-9,385,139 Three dimensional semiconductor memory devices and methods of fabricating the same
A 3D semiconductor device includes an electrode structure has electrodes stacked on a substrate, semiconductor patterns penetrating the electrode structure,...
US-9,385,138 Memory devices including vertical pillars and methods of manufacturing and operating the same
In a semiconductor device and a method of forming such a device, the semiconductor device comprises a substrate of semiconductor material extending in a...
US-9,385,137 Semiconductor memory device and method for manufacturing same
According to one embodiment, a method for manufacturing a semiconductor memory device includes forming a stacked body by alternately stacking an insulating film...
US-9,385,136 Silicon dot formation by self-assembly method and selective silicon growth for flash memory
Some embodiments of the present disclosure relate to a method that achieves a substantially uniform pattern of discrete storage elements within a memory cell. A...
US-9,385,135 Nonvolatile memory device and method for fabricating the same
A nonvolatile memory device includes a substrate; a channel layer projecting from a surface of the substrate, in a direction perpendicular to the surface; a...
US-9,385,134 Semiconductor device and method forming patterns with spaced pads in trim region
In a semiconductor device, parallel first and second conductive lines having a unit width extend from a memory cell region into a connection region. A trim...
US-9,385,133 Semiconductor device including memory cell with transistors disposed in different active regions
A semiconductor device having an SRAM which includes: a monolithic first active region in which a first transistor and a fifth transistor are disposed; a second...
US-9,385,132 Arrays of recessed access devices, methods of forming recessed access gate constructions, and methods of...
A method of forming an array of recessed access device gate constructions includes using the width of an anisotropically etched sidewall spacer in forming mask...
US-9,385,131 Wrap-around fin for contacting a capacitor strap of a DRAM
A conductive strap structure in lateral contact with a top semiconductor layer is formed on an inner electrode of a deep trench capacitor. A cavity overlying...
US-9,385,130 Semiconductor device and method for manufacturing the same
In order to achieve the reduction of contact resistance by forming a metal silicide layer with a sufficient thickness in an interface between a polycrystalline...
US-9,385,129 Method of forming a memory capacitor structure using a self-assembly pattern
A capacitor structure and method of forming thereof on a substrate is described. The capacitor structure includes a substrate having a plurality of capacitor...
US-9,385,128 Memory device and electronic device
A selection operation is performed for individual memory cells. A device includes a first memory cell and a second memory cell provided in the same row as the...
US-9,385,127 Method and apparatus for suppressing metal-gate cross-diffusion in semiconductor technology
An inverter includes: a PMOS comprising: a p-type source region, a p-type drain region, a p-channel region between the p-type source region and the p-type drain...
US-9,385,126 Silicon-on-insulator finFET with bulk source and drain
Embodiments of the invention provide a semiconductor structure including a finFET having an epitaxial semiconductor region in direct physical contact with a...
US-9,385,125 Semiconductor integrated circuit device
An MV-PMOS and MV-NMOS configuring a high side drive circuit are formed in an n-type isolation region formed on a p-type semiconductor substrate. The MV-NMOS is...
US-9,385,124 Methods of forming reduced thickness spacers in CMOS based integrated circuit products
One method disclosed herein includes, among other things, forming a first spacer proximate gate structures of first and second transistors that are opposite...
US-9,385,123 STI region for small fin pitch in FinFET devices
The present invention relates generally to semiconductor devices, and particularly to fabricating a shallow trench isolation (STI) region in fin field effect...
US-9,385,122 Method of manufacturing a semiconductor device using source/drain epitaxial overgrowth for forming self-aligned...
A method for manufacturing a semiconductor device comprises growing a source/drain epitaxy region over a plurality of gates on a substrate, wherein a top...
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