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Patent # Description
US-9,384,871 Polymer composition comprising carbon nanotubes
A composition can include polystyrene, modified-polystyrene, or a mixture thereof. The polystyrene, modified-polystyrene, or mixture thereof can include carbon...
US-9,384,870 Mechanically robust, electrically conductive ultralow-density carbon nanotube-based aerogels
A method of making a mechanically robust, electrically conductive ultralow-density carbon nanotube-based aerogel, including the steps of dispersing nanotubes in...
US-9,384,869 Anisotropic conductive film, composition for the same, and apparatus including the same
An anisotropic conductive film includes a binder part, a curing part, an initiator, and conductive particles, wherein the binder part includes at least one of a...
US-9,384,868 Water-based conductive ink for inkjet recording
There is provided a water-based conductive ink for inkjet recording, the water-based conductive ink enabling formation of highly conductive circuit wiring even...
US-9,384,867 Flexible, semiconducting nanocomposite materials based on nanocrystalline cellulose and polyaniline
A new approach is conceived for the development of organic polymeric conducting materials synthesized from nanocomposites of nanocrystalline cellulose (NCC) and...
US-9,384,866 Polyaniline composite, method for producing same, and composition
A polyaniline composite including substituted or unsubstituted polyaniline molecules and a proton donar, the polyaniline molecules being doped with the proton...
US-9,384,865 Transparent conductor, composition for preparing the same, and optical display apparatus including the same
A transparent conductor, a composition for the same, and an apparatus including the same, the transparent conductor including a transparent conductive film, the...
US-9,384,864 High resolution imaging system for digital dentistry
The invention provides methods and apparatus for detecting radiation including x-ray photon (including gamma ray photon) and particle radiation for dental x-ray...
US-9,384,863 Apparatus for retention of molten material outside generation IV reactor after nuclear power plant accident
An apparatus for retention of molten material for a Generation IV reactor after a nuclear power plant accident comprises an inner wall which is peripherally...
US-9,384,862 Method of fabricating liquid-metal coolants for nuclear reactors
A method of fabricating a liquid-metal coolant includes adding nanoparticles to the liquid-metal coolant to change neutronic properties of the liquid-metal...
US-9,384,861 Data loading circuit and semiconductor memory device comprising same
A data loading circuit comprises a non-volatile memory configured to store non-volatile data and output a serial data signal based on the stored non-volatile...
US-9,384,860 Semiconductor memory of which defective cell is replaceable with redundant cell and manufacturing method of...
A semiconductor memory includes a memory cell array that includes data cells of x bits and redundant cells of y bits for each word; a position-data storage unit...
US-9,384,859 Repair circuit and semiconductor memory device including the same
A repair circuit includes a normal decoder suitable for decoding partial input addresses of input addresses in response to a first control signal, a comparison...
US-9,384,858 Computer system predicting memory failure
The prediction of memory failure is obtained by reducing the voltage on a bank of memory cells to momentarily artificially age the memory cells and subjecting...
US-9,384,857 Error control using threshold based comparison of error signatures
A technique is provided for system reliability. An input is received, and a computation operation on the input is repeated to generate multiple output values....
US-9,384,856 Memories having a built-in self-test (BIST) feature
A memory system includes a memory and a built-in self-test (BIST) unit coupled to the memory. The BIST unit is configured to run a test pattern on the memory to...
US-9,384,855 System-on-chip having special function register and operating method thereof
Exemplary embodiments disclose a system-on-chip (SoC) including a special function register (SFR) and an operating method thereof. The SFR comprises a first...
US-9,384,854 Complementary metal-oxide-semiconductor (CMOS) analog switch circuit
A Complementary Metal-Oxide-Semiconductor (CMOS) analog switch has a circuit structure such that when a supply voltage is applied, the CMOS analog switch biases...
US-9,384,853 Shift register
A shift register includes a plurality of stages each outputting k composite pulses each including an A-scan pulse and a B-scan pulse. At least one stage...
US-9,384,852 Semiconductor device
A semiconductor device which includes a normal cell, a replica cell, a word line, a first bit line, a bias generation circuit, a second bit line, and a current...
US-9,384,851 Semiconductor devices and semiconductor systems including the same
The semiconductor device includes a latch pulse generator and a data latch unit. The latch pulse generator generates a test section signal in response to a test...
US-9,384,850 OTP read sensor architecture with improved reliability
Circuits and methods for reading an OTP memory cell with improved reliability. To read a first OTP memory cell, a first current amount generated by a second,...
US-9,384,849 Memory control apparatus, memory control method, and storage medium
A memory control apparatus, a memory control method, and a program are provided which allow reduction of the number of times of writing to a nonvolatile memory....
US-9,384,848 Nonvolatile semiconductor memory with dual latch sense amplifier
A memory includes first and second select gate transistors, memory cells, a source line, a bit line, a selected word line which is connected to a selected...
US-9,384,847 Clock mode determination in a memory system
A clock mode configuration circuit for a memory device is described. A memory system includes any number of memory devices serially connected to each other,...
US-9,384,846 Semiconductor memory device, memory system including the same, and operating method thereof
Disclosed are a semiconductor memory device, a memory system including the same, and an operating method thereof. The memory system includes: a semiconductor...
US-9,384,845 Partial erase of nonvolatile memory blocks
Erasing blocks of a nonvolatile memory may include two erase steps. A first erase step brings the memory cells of a block to an intermediate state between their...
US-9,384,844 Flash memory apparatus and data erasing method thereof
A flash memory apparatus and data erasing method thereof. The data erasing method includes: setting a plurality of incremental erasing voltages sequentially,...
US-9,384,843 Nonvolatile memory having memory array with differential cells
A nonvolatile memory includes a memory array. The memory array is connected to m word lines and (2+n) bit line pairs. These bit line pairs include an erase bit...
US-9,384,842 Method and system to improve soft-programming time in non-volatile memory
A method of erasing a plurality of non-volatile memory (NVM) cells on a die includes applying erase signals to the plurality of NVM cells. A subset of the...
US-9,384,841 Semiconductor device, semiconductor system having the same and operating method thereof
A semiconductor device may include memory blocks having a plurality of strings including drain select transistors and memory cells electrically coupled in...
US-9,384,840 Method compensation operating voltage, flash memory device, and data storage device
Disclosed is a method generating a compensated operating voltage, such as a read voltage, in a non-volatile memory device, and a related non-volatile memory...
US-9,384,839 Write sequence providing write abort protection
In a multi-level cell (MLC) nonvolatile memory array, data is assigned sequentially to the lower and upper page of a word line, then both lower and upper pages...
US-9,384,838 Split block decoder for a nonvolatile memory device
A non-volatile memory device having a memory array organized into a plurality of memory blocks, having either planar memory cells or stacks of cells. Row...
US-9,384,837 Method of erasing memory cells when changing their mode of operation within a nonvolatile memory device
An method of operating a memory system including a plurality of memory cells includes changing an operation mode at least some of the memory cells which operate...
US-9,384,836 Content addressable memory
This disclosure provides a content addressable memory which includes: a data memory cell for storing a data bit; a mask memory cell for storing a mask bit; and...
US-9,384,835 Content addressable memory early-predict late-correct single ended sensing
Circuits and methods for performing search operations in a content addressable memory (CAM) array are provided. A system for searching a CAM includes a circuit...
US-9,384,834 Storage device with 2D configuration of phase change memory integrated circuits
A storage device, apparatus, and method to write and/or read data from such storage device. The storage device, comprises a channel controller and phase change...
US-9,384,833 Memory system
The memory system includes at least one volatile memory configured to store data. The memory system also includes a non-volatile memory controller configured to...
US-9,384,832 Memory device and method of operating the same
A method is for operating a memory device including a plurality of memory cells disposed in regions where a plurality of first signal lines and a plurality of...
US-9,384,831 Cross-point memory single-selection write technique
A system and technique is disclosed for writing data in a cross-point memory. The state of one or more memory cells of the cross-point memory are sensed and...
US-9,384,830 Apparatuses and methods for performing multiple memory operations
The disclosed technology relates to a memory device configured to perform multiple access operations in response to a single command received through a memory...
US-9,384,829 Memory device
A memory device includes n (n being an integer of 2 or more) resistance change films being series connected to each other. Each of the resistance change films...
US-9,384,828 Electronic device and method for operating the same
An electronic device including a semiconductor memory. The semiconductor memory includes a plurality of variable resistance elements; a plurality of read...
US-9,384,827 Timing control in a quantum memory system
One embodiment describes a quantum memory system. The system includes a plurality of quantum memory cells arranged in an array of rows and columns. Each of the...
US-9,384,826 Circuits and methods for performance optimization of SRAM memory
In aspects of the present application, circuitry for storing data is provided including a static random access memory (SRAM) circuit operable to store data in...
US-9,384,825 Multi-port memory circuits
A multi-port hybrid full-swing/low-swing memory circuit in a static random access memory (SRAM) device comprises a first wordline driver that comprises a read...
US-9,384,824 List sort static random access memory
A list sort static random access memory (LSSRAM) unit cell includes a static random access memory (SRAM) cell having a pair of cross-coupled elements to store...
US-9,384,823 SRAM array comprising multiple cell cores
An SRAM array having multiple cell cores to store and retrieve data. A cell core includes a plurality of SRAM cells, and at least two corresponding cell cores...
US-9,384,822 Systems and methods involving data bus inversion memory circuitry, configuration and/or operation including...
Systems, methods and fabrication processes relating to dynamic random access memory (DRAM) devices involving data signals grouped into 10 bits are disclosed....
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