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Patent # Description
US-9,391,225 Two-dimensional APDs and SPADs and related methods
Avalanche photodiodes (APDs) and single photon avalanche detectors (SPADs) are provided with a lateral multiplication region that provides improved...
US-9,391,224 Solar battery
Disclosed is a solar battery which: is made from a silicon semiconductor; has a high quantum-conversion efficiency; requires a small number of production steps...
US-9,391,223 Photovoltaic sheathing element with a flexible connector assembly
The present invention is premised upon an assembly including at least a photovoltaic sheathing element capable of being affixed on a building structure, the...
US-9,391,222 Frame for a plate-shaped solar element
The invention relates to a frame for a plate-shaped solar element. The frame includes a bottom frame element (21) with a first surface (24) and a top frame...
US-9,391,221 Solar cell module and apparatus for generating photovoltaic power
A solar cell module includes a solar cell panel including at least one solar cell; and a frame positioned at a periphery of the solar cell panel. The frame...
US-9,391,220 System and method for interfacing large-area electronics with integrated circuit devices
A system and method for interfacing large-area electronics with integrated circuit devices is provided. The system may be implemented in an electronic device...
US-9,391,219 Photovoltaic apparatus
A photovoltaic apparatus includes a support substrate; a back electrode layer on the support substrate; a light absorbing layer on the back electrode layer; and...
US-9,391,218 Voltaic cell powered by radioactive material
A voltaic cell uses a radioactive material for energy. Energetic particles emitted by the radioactive material boost charge carriers within a semiconductor...
US-9,391,217 Aluminum-based compositions and solar cells including aluminum-based compositions
The present invention describes an aluminum-based paste composition including an aluminum powder, one or more glass frits, an organo-aluminate compound; and an...
US-9,391,216 Optical coupled sensors for harsh environments
An optical sensor comprising a light source; a sensor substrate, arranged to receive a force to be detected, the sensor substrate including an interference...
US-9,391,215 Device for generating photovoltaic power and method for manufacturing same
Disclosed are a solar cell apparatus and a method of fabricating the same. The solar cell apparatus includes a substrate; a first cell on the substrate; a...
US-9,391,214 Varactor structure
A MOS varactor structure comprising a semiconductor body having a well region and a plurality of gate electrodes and a plurality of cathode electrodes arranged...
US-9,391,213 Thin film transistor and display device using the same
In a bottom gate thin film transistor using a first oxide semiconductor layer as a channel layer, the first oxide semiconductor layer and second semiconductor...
US-9,391,212 Thin film transistor array panel and organic light emitting diode display including the same
A thin film transistor substrate according to an exemplary embodiment includes: a substrate; a gate electrode disposed on the substrate; a gate insulating layer...
US-9,391,211 Compositions for solution process, electronic devices fabricated using the same, and fabrication methods thereof
Exemplary embodiments provide compositions for a solution process, electronic devices fabricated using the same, and fabrication methods thereof. An oxide...
US-9,391,210 Top gate TFT with polymer interface control layer
A transistor includes a substrate and a polymer layer that is in contact with the substrate. The polymer layer has a first pattern defining a first area. There...
US-9,391,209 Semiconductor device
An object is to provide a semiconductor device including an oxide semiconductor in which miniaturization is achieved while favorable characteristics are...
US-9,391,208 Electronic device and method of manufacturing the same
An electronic device including at least one electronic component and a method of manufacturing the same are provided. The electronic device may include a...
US-9,391,207 Thin film transistor, array substrate and manufacturing method thereof, and display device
The present invention provides a low-temperature polysilicon thin film transistor and a manufacturing method thereof, an array substrate and a manufacturing...
US-9,391,206 Methods of forming transistors
Some embodiments include methods of forming transistors. Recesses are formed to extend into semiconductor material. The recesses have upper regions lined with...
US-9,391,205 Gate last semiconductor structure and method for forming the same
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and a metal gate structure formed...
US-9,391,204 Asymmetric FET
After forming a first-side epitaxial semiconductor region and a second-side epitaxial semiconductor region on recessed surfaces of a semiconductor portion that...
US-9,391,203 Channel epitaxial regrowth flow (CRF)
A Fin-FET fabrication approach and structure are provided using channel epitaxial regrowth flow (CRF). The method includes forming a Fin-FET structure including...
US-9,391,202 Semiconductor device
The semiconductor device including: a semiconductor layer extending in a first direction, the semiconductor layer including a pair of source/drain regions and a...
US-9,391,201 Source/drain structure and manufacturing the same
A fin-like field-effect transistor (FinFET) device is disclosed. The device includes a semiconductor substrate having a source/drain region, a plurality of...
US-9,391,200 FinFETs having strained channels, and methods of fabricating finFETs having strained channels
Techniques and structures for controlling etch-back of a finFET fin are described. One or more layers may be deposited over the fin and etched. Etch-back of a...
US-9,391,198 Strained semiconductor trampoline
A method of forming a strained trampoline including: forming a strain inducing layer on a semiconductor-on-insulator (SOI), the SOI having a semiconductor layer...
US-9,391,197 Semiconductor device and operating method thereof
A semiconductor device includes a substrate; a deep well region disposed in the substrate; an element region disposed in the substrate and in the deep well...
US-9,391,196 High-voltage metal-oxide-semiconductor transistor device and manufacturing method thereof
A high-voltage metal-oxide-semiconductor (HV MOS) transistor device and a manufacturing method thereof are provided. The HV MOS transistor device includes a...
US-9,391,195 High side gate driver device
The present disclosure provides a semiconductor device. The semiconductor device includes: a drift region having a first doping polarity formed in a substrate;...
US-9,391,194 High voltage vertical FPMOS fets
Semiconductor power devices such as vertical FPMOS are described preferably having a plurality of trenches formed at a top portion of a semiconductor substrate...
US-9,391,193 Trench-based power semiconductor devices with increased breakdown voltage characteristics
Exemplary power semiconductor devices with features providing increased breakdown voltage and other benefits are disclosed.
US-9,391,192 Field effect semiconductor component and method for producing it
What is provided is a field effect component including a semiconductor body, which extends in an edge zone from a rear side as far as a top side and which...
US-9,391,191 Trench FET having merged gate dielectric
In one implementation, a trench field-effect transistor (trench FET) includes a semiconductor substrate having a drain region, a drift zone over the drain...
US-9,391,190 Field effect transistor incorporating a Schottky diode
A FET incorporating a Schottky diode has a structure allowing the ratio of an area in which the Schottky diode is formed and an area in which the FET is formed...
US-9,391,189 Lateral/vertical semiconductor device
A lateral semiconductor device and/or design including a space-charge generating layer and a set of electrodes located on an opposite side of a device channel...
US-9,391,188 Semiconductor device and method for fabricating semiconductor device
Disclosed is a semiconductor device and a method for fabricating the semiconductor device. The method for fabricating the semiconductor device comprises steps...
US-9,391,187 Semiconductor heterojunction device
In an example embodiment, a heterojunction device comprises a substrate, a multilayer structure disposed on the substrate. The multilayer structure has a first...
US-9,391,186 Semiconductor device
A semiconductor device may include: a first semiconductor layer having a first band gap; a second semiconductor layer including first and second regions...
US-9,391,185 III-nitride power semiconductor device
A III-nitride power semiconductor device that includes a two dimensional electron gas having a reduced charge region under the gate thereof.
US-9,391,184 Insulated gate turn-off device with turn-off transistor
An insulated gate turn-off (IGTO) device, formed as a die, has a layered structure including a p+ layer (e.g., a substrate), an n- epi layer, a p-well, vertical...
US-9,391,183 Semiconductor device
A semiconductor device is disclosed that comprises semiconductor regions and an insulating film. A groove extends from a top surface of a semiconductor region...
US-9,391,182 Trench insulated-gate bipolar transistor and manufacture method thereof
A Trench Insulated Gate Bipolar Transistor (IGBT) and a manufacture method thereof are provided by the present invention, which belongs to the field of IGBT...
US-9,391,181 Lattice mismatched hetero-epitaxial film
An embodiment concerns forming an EPI film on a substrate where the EPI film has a different lattice constant from the substrate. The EPI film and substrate may...
US-9,391,180 Heterojunction bipolar transistors with intrinsic interlayers
Heterojunction bipolar transistors are provided that include at least one contact (e.g., collector, emitter, and/or base) formed by a heterojunction between a...
US-9,391,179 Vertical GaN JFET with low gate-drain capacitance and high gate-source capacitance
An embodiment of a vertical power device includes a III-nitride substrate, a drift region coupled to the III-nitride substrate and comprising a III-nitride...
US-9,391,178 Method of manufacturing semiconductor device
Provided is a method of manufacturing a semiconductor device which allows an operation of the semiconductor device to be stabilized without increasing the area...
US-9,391,177 Method of fabricating semiconductor structure
The present invention provides a method for improving gate coupling ratio of a flash memory device and a protruding floating gate is formed. First, a substrate...
US-9,391,176 Multi-gate FETs having corrugated semiconductor stacks and method of forming the same
The present disclosure provides, in various aspects of the present disclosure, a semiconductor device which includes a semiconductor stack disposed over a...
US-9,391,175 Fin end spacer for preventing merger of raised active regions
After formation of gate structures over semiconductor fins and prior to formation of raised active regions, a directional ion beam is employed to form a...
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