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FinFET device and method for manufacturing the same
A FinFET device and a method for manufacturing the same. The FinFET device includes a plurality of fins each extending in a first direction on a substrate; a...
Sacrificial oxide with uniform thickness
A semiconductor device includes a silicon-based substrate, a gate structure and a laminated sacrificial oxide layer. The gate structure is on the silicon-based...
A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third...
A semiconductor device includes first electrode, first semiconductor layer of first conductivity type on the first electrode, second semiconductor layer of...
MIM capacitor with enhanced capacitance formed by selective epitaxy
An on-chip capacitor with enhanced capacitance and a method of forming the same are provided. An epitaxial process is employed to selectively form semiconductor...
Power rectifier using tunneling field effect transistor
A power rectifier includes a stage having a first Tunneling Field-Effect Transistor ("TFET") having a source, a gate, and a drain, a second TFET having a...
Multiple silicide integration structure and method
A structure and method for providing a multiple silicide integration is provided. An embodiment comprises forming a first transistor and a second transistor on...
To provide a technique capable of reducing the chip size of a semiconductor chip and particularly, a technique capable of reducing the chip size of a...
Electrostatic discharge and passive structures integrated in a vertical
gate fin-type field effect diode
Field effect diode structures utilize a junction structure that has an L-shape in cross-section (a fin extending from a planar portion). An anode is positioned...
In order to provide a semiconductor device having high ESD tolerance, a semiconductor device (IC) is formed so that: a ground voltage wiring (22a) is...
Under voltage tolerant clamp
An apparatus comprises an integrated circuit (IC) comprising an external IC connection, an IC substrate connection, a voltage clamp circuit and an under voltage...
Apparatuses, circuits, and methods for protection circuits for
Apparatuses, circuits, and methods are disclosed for biased protection circuits for dual-direction nodes. In one such example apparatus, a protection circuit is...
Uni-directional transient voltage suppressor (TVS)
A unidirectional transient voltage suppressor (TVS) device includes first and second NPN transistors that are connected in parallel to each other. Each NPN...
Electrostatic discharge protection
An electrostatic discharge (ESD) protection device implemented in finFET technology is disclosed. The device has a reduced thickness shallow trench isolation...
Solid-state power controller channel protection systems and methods
A scalable solid-state power controller system is provided with channel protection features. A plurality of output channels may be combined to provide a...
Transient voltage suppressor and its manufacturing method
A transient voltage suppressor and its manufacturing method are provided, which can easily control voltage withstanding characteristics of a Zener diode by...
Integrated circuit on SOI comprising a transistor protecting from
An integrated circuit includes first and second electronic components, a buried UTBOX insulating layer, first and second ground planes plumb with the first and...
Mask optimization for multi-layer contacts
A method for mask optimization, the method including moving any features of a gate contact mask that are in violation of a spacing rule to a second layer...
Power module having stacked substrates arranged to provide tightly-coupled
source and return current paths
Power modules with reduced parasitic inductances are provided. A power module includes a first substrate including a first electrically-conductive layer and a...
Method of making the light source structure in flexible substrate
Light emitting diode (LED) package structures employing large area substrates are described. Panel or reel-to-reel substrate processing is utilized in the...
Non-shrink varistor substrate and production method for same
Disclosed are a non-shrink varistor substrate and a method of manufacturing the same, wherein the non-shrink varistor substrate includes: a reinforcement layer...
There is provided a semiconductor device. The semiconductor device includes: a first board; a second board joined to the first board; a connection terminal...
Display device using semiconductor light emitting device and method of
fabricating the same
A display device using a semiconductor light emitting device and a method of fabricating the semiconductor light emitting device are disclosed. The display...
Semiconductor light emitting device and fabrication method for same
The purpose of the present invention is to provide a double-sided light emitting type semiconductor light emitting device that can be easily fabricated even if...
Molding package assembly and molding material
A molding package assembly is provided, which includes a substrate and first and second molding packages stacked on the substrate. Each of the first and second...
A semiconductor package, comprising: a substrate; a first semiconductor chip; and at least one second semiconductor chip. The first semiconductor chip and the...
3-D stacked and aligned processors forming a logical processor with power
modes controlled by respective set of...
Processor devices are provided which operate in one of multiple power operating modes. A processor device comprises first and second processor chips connected...
Semiconductor device and method of forming 3D semiconductor package with
semiconductor die stacked over...
A semiconductor device has a substrate and plurality of first semiconductor die having conductive vias formed through the first semiconductor die mounted with...
Recessed semiconductor substrates and associated techniques
Embodiments of the present disclosure provide a method, comprising providing a semiconductor substrate having (i) a first surface and (ii) a second surface that...
Printed wiring board and method for manufacturing printed wiring board
A printed wiring board includes a first insulation layer, an electronic component built into the first insulation layer, a second insulation layer having a via...
Semiconductor device and manufacturing method thereof
A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method...
Micro device transfer system with pivot mount
Systems and methods for transferring a micro device from a carrier substrate are disclosed. In an embodiment, a micro pick up array mount includes a pivot...
Fan-out wafer level package structure
A method for forming a package structure may comprise applying a die and vias on a carrier having an adhesive layer and forming a molded substrate over the...
Planarity-tolerant reworkable interconnect with integrated testing
A structure includes an electrical interconnection between a first substrate including a plurality of protrusions and a second substrate including a plurality...
Solder balls and semiconductor device employing the same
A solder ball and a semiconductor device using the same are provided. In a Sn-based solder ball in which a first plating layer and a second plating layer are...
Semiconductor device and power supply unit utilizing the same
A semiconductor device has pluralities of grid array terminals forming a grid array structure, e.g. a BGA structure, in which the output end of a built-in...
Semiconductor device including a protective film
A semiconductor device includes a semiconductor chip having a wire and a passivation film formed on the outermost surface with an opening partially exposing the...
Semiconductor device and manufacturing method thereof
A semiconductor device includes a first semiconductor electronic component which includes a pad electrode, a solder bump, and a metal layer between a pad and...
Semiconductor device and method of manufacturing the same
A semiconductor device with improved reliability is provided. The semiconductor device is characterized by its embodiments in that sloped portions are formed on...
Interfacial alloy layer for improving electromigration (EM) resistance in
Problem To improve the electromigration (EM) resistance of a solder joint. Solution The present invention provides a unique structure for an interfacial alloy...
The semiconductor device has the CSP structure, and may include a plurality of electrode pads formed on a semiconductor integrated circuit in order to...
Integrated circuits with internal pads
An embodiment includes an integrated circuit, comprising: a substrate; a first circuit formed on the substrate and coupled to a plurality of first pads on the...
Method for manufacturing electronic device and electronic device
A method for manufacturing an electronic device, the method includes: applying an adhesive film on a package board; placing an electronic component on the...
On-chip semiconductor device having enhanced variability
A physical unclonable function (PUF) semiconductor device includes a semiconductor substrate extending along a first direction to define a length and a second...
According to one embodiment, an electronic device includes a first substrate, a second substrate, an electronic component and a first shield. The first...
Integrated circuit dies having alignment marks and methods of forming same
Dies having alignment marks and methods of forming the same are provided. A method includes forming trenches on a first side of a first workpiece, a die of the...
Embedded semiconductor device package and method of manufacturing thereof
A package structure includes a dielectric layer, at least one semiconductor device attached to the dielectric layer, one or more dielectric sheets applied to...
Semiconductor packages and methods of packaging semiconductor devices
Package substrate, semiconductor packages and methods for forming a semiconductor package are presented. The package substrate includes a base substrate having...
Reliable microstrip routing for electronics components
Reliable microstrip routing arrangements for electronics components are described. In an example, a semiconductor apparatus includes a semiconductor die having...
Multi-layer dielectric stack for plasma damage protection
Embodiments of the disclosure generally provide multi-layer dielectric stack configurations that are resistant to plasma damage. Methods are disclosed for the...