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Patent # Description
US-9,396,826 Isotope production target
An isotope production target may include an outer diameter wall and an inner diameter wall. An isotope source may be located between the inner diameter wall and...
US-9,396,825 Method and system for simultaneous irradiation and elution capsule
A capsule for holding, irradiating, and eluting a material is provided. Methods of fabricating and using the capsule are also provided. The capsule may include...
US-9,396,824 Container system for radioactive waste
A container system, for radioactive waste and method for using the same is provided. The system includes a canister configured for holding radioactive waste and...
US-9,396,823 Floating nuclear power reactor with a self-cooling containment structure and an emergency heat exchange system
A floating nuclear power reactor includes a self-cooling containment structure and an emergency heat exchange system. The containment structure of the reactor...
US-9,396,822 Emergency and back-up cooling of nuclear fuel and reactors
An embodiment uses liquid nitrogen, the densest and highly transportable form of nitrogen, and the cold nitrogen gas it produces when released from its...
US-9,396,821 Safety system for a nuclear plant and nuclear plant with a safety system
A safety system for a nuclear plant includes a plurality of catalytic recombiner elements each triggering a recombination reaction with oxygen when hydrogen is...
US-9,396,820 Submerged electricity production module
The underwater electricity production module according to the invention includes means in the form of an elongated cylindrical box (12) in which means are...
US-9,396,819 Single pass RF driver
The disclosed embodiments relate to ion delivery mechanisms, e.g., for fusion power. Particularly, some embodiments relate to systems and methods for delivering...
US-9,396,818 Semiconductor memory device and operation method thereof
A semiconductor memory device includes a memory cell array including a plurality of memory cells and a plurality of redundancy memory cells, a fuse array to be...
US-9,396,817 Self-repairing memory and method of use
A self-repair unit includes a self-repair address comparator configured to receive address information from a control logic circuit, and to compare the received...
US-9,396,816 Semiconductor device and semiconductor system including the same
A semiconductor system includes: a memory controller; and a memory which determines whether to enable a control signal in response to block mode entry signals...
US-9,396,815 Memory structure
A memory structure includes a memory row of a memory array, a plurality of first bits, a first redundancy row, and a plurality of second bits. The memory row...
US-9,396,814 Systems and methods for acoustic wave enabled data storage
The present disclosure provides systems and methods for storing, reading, and writing data using particle-based acoustic wave driven shift registers. The shift...
US-9,396,813 Shift register cell, shift register, gate driver and display panel
A shift register cell comprising a first drive signal input terminal, a first drive signal output terminal, a first clock signal input terminal, a first pull-up...
US-9,396,812 Pulse signal output circuit and shift register
An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal...
US-9,396,811 Magnetic memory, method of recording data to and reproducing data from magnetic memory, and method of operating...
A magnetic memory according to an embodiment includes: a plurality of groups of magnetic nanowires extending in a direction, each group of magnetic nanowires...
US-9,396,810 Systems and methods for acoustic wave enabled data storage
The present disclosure provides systems and methods for storing, reading, and writing data using particle-based acoustic wave driven shift registers. The shift...
US-9,396,809 Semiconductor memory device and memory system including the same
A semiconductor memory device includes a command buffering unit suitable for receiving and buffering a command signal based on an enable control signal, a fuse...
US-9,396,808 Method and apparatus for program and erase of select gate transistors
Techniques are provided for programming select gate transistors in connection with the programming of a set of memory cells. In response to a program command to...
US-9,396,807 Incremental programming pulse optimization to reduce write errors
In a data storage system having multi-level memory cells, a counter tracks the number of program/erase cycles, anticipated read cycles, or anticipated length of...
US-9,396,806 Method, electronic device and controller for recovering memory array
A method, an electronic device and a controller for recovering an array of memory cells are provided. The method comprises the following steps. Whether a...
US-9,396,805 Nonvolatile memory system with improved signal transmission and reception characteristics and method of...
A non-volatile memory system and a method of operating a non-volatile memory system are provided. The method includes receiving a command from a host,...
US-9,396,804 Memory programming method, memory control circuit unit and memory storage apparatus
A memory programming method for a physical erasing unit of a rewritable non-volatile memory is provided. The method includes: programming a first data stream...
US-9,396,803 Non-volatile semiconductor memory device
A semiconductor memory device, which restrains a breakdown of a low-voltage transistor constructing a bit line selecting circuit, is provided. An NAND string...
US-9,396,802 Erase system and method of nonvolatile memory device
An erase system and method of a nonvolatile memory device includes supplying an erase voltage to a plurality of memory cells of a nonvolatile memory, performing...
US-9,396,801 Memory, and erasing method, programming method and reading method thereof
Memory, and erasing, programming and reading method thereof are provided. In the memory, a first isolation cell, a second isolation cell and a memory cell have...
US-9,396,800 Memory system and programming method thereof
A program method of a nonvolatile memory device is provided, which includes programming a memory cell in one string selected from a plurality of vertical...
US-9,396,799 Semiconductor memory device improving threshold voltage of unselected memory block and method of operating the same
A semiconductor memory device and a method of operating the same are provided. The device may include a memory cell array including a plurality of memory blocks...
US-9,396,798 Enhanced flash chip and method for packaging chip
An enhanced Flash chip and a method for packaging chip, wherein the enhanced Flash chip comprising: a FLASH and a RPMC, packaged integrally; the FLASH and the...
US-9,396,797 Program methods of memory devices using bit line sharing
A program method of a nonvolatile memory device includes loading first word line data to be stored in first memory cells connected to a first word line and...
US-9,396,796 Memory system including nonvolatile memory devices which contain multiple page buffers and control logic...
A nonvolatile memory device includes an array of nonvolatile memory cells and a plurality of page buffers configured to receive a plurality of pages of data...
US-9,396,795 Storage device supporting logical operations, methods and storage medium
A storage device has a plurality of storage cells for storing data values. Control circuitry is provided to simultaneously couple at least two cells to at least...
US-9,396,794 Matchline retention for mitigating search and write conflict
Systems and methods relate to a matchline receiver of a content-addressable memory (CAM). A matchline of the CAM, which provides a hit/miss indication for a...
US-9,396,793 Phase change memory, writing method thereof and reading method thereof
A phase change memory (PCM), a writing method thereof and a reading method thereof are provided. The PCM has a plurality of memory cells. The writing method...
US-9,396,792 Adjusting log likelihood ratio values to compensate misplacement of read voltages
An apparatus having a circuit and an interface to a nonvolatile memory is disclosed. The circuit is configured to (i) perform one or more attempts of a...
US-9,396,791 Programming memories with multi-level pass signal
Memories and methods for programming memories with multi-level pass signals are provided. One method includes programming cells of the memory selected to be...
US-9,396,790 Multi-supply dual port register file
A multi-supply dual port register file is disclosed. The register file may be used for transferring data between two power domains that operate on different...
US-9,396,789 Memory control device and a delay controller
A memory control device includes a plurality of delay circuits to set a delay value for each terminal of a memory, each of the plurality of delay circuits being...
US-9,396,788 Information processing apparatus and information processing method
An information processing apparatus includes a memory that is volatile, a memory controller connected to the memory in an information exchangeable manner, and a...
US-9,396,787 Memory operations using system thermal sensor data
Memory operations using system thermal sensor data. An embodiment of a memory device includes a memory stack including one or more coupled memory elements, and...
US-9,396,786 Memory and memory system including the same
A memory includes a plurality of word lines each coupled to one or more memory cells, an address storage unit suitable for storing an address of a word line...
US-9,396,785 Memory device refresh commands on the fly
On the fly switching from one memory device refresh rate to another is provided. Control logic associated with the memory device detects a condition to switch...
US-9,396,784 Reduction of power consumption in memory devices during refresh modes
Devices, systems, and methods include an active mode to accommodate read/write operations of a memory device and a self-refresh mode to accommodate recharging...
US-9,396,783 Magnetic random access memory with dynamic random access memory (DRAM)-like interface
A memory device includes a magnetic memory unit for storing a burst of data during a burst write operation. Each burst of data includes sequential data units...
US-9,396,782 Method for writing to a random access memory (MRAM) cell with improved MRAM cell lifespan
Method for writing to a MRAM cell including a magnetic tunnel junction including a first and second ferromagnetic layer, and a tunnel barrier layer; and a...
US-9,396,781 Magnetic random access memory having perpendicular composite reference layer
The present invention is directed to an STT-MRAM device including a plurality of magnetic tunnel junction (MTJ) memory elements. Each of the memory elements...
US-9,396,780 Decoder
A memory system has a decoder circuit that includes a first driver circuit having an input coupled to receive a first pre-decode signal. The first driver...
US-9,396,779 Semiconductor memory device and operation method thereof
A semiconductor memory device includes a clock input block suitable for generating first and second internal clocks in response to an external clock, a clock...
US-9,396,778 Conditional memory calibration cancellation
A method and apparatus for conditional cancellation of a calibration procedure is performed. In one embodiment, a memory controller is coupled to memory. The...
US-9,396,777 Stacked memory device and system
A stack memory device may include a core chip and a base chip. The core chip may include a data receiver, a strobe signal generation unit, and a test register....
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