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Patent # Description
US-9,396,019 Management communication
The present invention relates to methods and apparatus for improving management communication. One or more performance parameter measurements may be received by...
US-9,396,018 Low latency architecture with directory service for integration of transactional data system with analytical...
Low latency communication between a transactional system and analytic data store resources can be accomplished through a low latency key-value store with...
US-9,396,017 Preferential CPU utilization for tasks
A set of like tasks to be performed is organized into a first group, and a last used processing group associated with the like tasks is stored. Upon a...
US-9,396,016 Handoff of virtual machines based on security requirements
Examples disclosed herein provide systems, methods, and software to handoff virtual machines between hypervisors. In one implementation, a method of...
US-9,396,015 Flexible device templates for connected consumer devices
A processing device executing a registration service receives information identifying a first device, a second device and an application running on the first...
US-9,396,014 Data swap in virtual machine environment
The present invention provides a method and apparatus for data swap in a virtual machine environment. The present invention provides a method for data swap in a...
US-9,396,013 Method for controlling a virtual machine and a virtual machine system
A next-generation OS with a virtualization feature is executed as a user program on a first virtual processor by selecting, in response to a cause of a call for...
US-9,396,012 Systems and methods of using a hypervisor with guest operating systems and virtual processors
An apparatus includes a processor and a guest operating system. In response to receiving a request to create a task, the guest operating system requests a...
US-9,396,011 Algorithm and apparatus to deploy virtual machine monitor on demand
In the various aspects, virtualization techniques may be used to improve performance and reduce the amount of power consumed by selectively enabling a...
US-9,396,010 Optimization of packet processing by delaying a processor from entering an idle state
Some embodiments facilitate high performance packet-processing by enabling one or more processors that perform packet-processing to determine whether to enter...
US-9,396,009 Optimized global capacity management in a virtualized computing environment
Machines, systems and methods for managing resources allocated in a virtualized computing network are provided. The method comprises monitoring resource usage...
US-9,396,008 System and method for continuous optimization of computing systems with automated assignment of virtual...
A system and method for automatically reconfiguring a computing environment comprises a consumption analysis server, a placement server, a deployment server in...
US-9,396,007 Cache management in a multi-threaded environment
Disclosed here are methods, systems, paradigms and structures for deleting shared resources from a cache in a multi-threaded system. The shared resources can be...
US-9,396,006 Distributing and verifying authenticity of virtual macahine images and virtual machine image reposiroty using...
A computer implemented method distributes a virtual machine image. A request for a virtual machine image is received. Responsive to receiving the request or the...
US-9,396,005 Method, apparatus and computer storage medium for plug-in management and control
A system computer storage medium for plug-in management and control is described. The system performs control on the plug-ins in system or application software...
US-9,396,004 System and method for management of a configuration of a virtual machine
An embodiment of a system and method of managing a configuration of a virtual machine. An embodiment may include analyzing a configuration of a first computing...
US-9,396,003 Information provision system, information provision method, and information provision program
An information providing system according to an embodiment includes an acquisition unit and a display control unit. The acquisition unit acquires a plurality of...
US-9,396,002 Synchronizing a cursor from a managed system with a cursor from a remote system
A method includes receiving reports of the pointing device events occurring on a remote computer at a host computer and performing computations in the host...
US-9,396,001 Window management for an embedded system
Methods and apparatus are provided for providing a window management system for an embedded system. In one embodiment a method includes configuring an operating...
US-9,396,000 Methods and systems to permit multiple virtual machines to separately configure and access a physical device
Methods and systems to permit multiple virtual machines (VMs) to separately configure and access a physical resource, substantially outside of a virtual machine...
US-9,395,999 Microcomputer having processor capable of changing endian based on endian information in memory
There is a need to provide a microcomputer capable of eliminating an external terminal for endian selection. Flash memory includes a user boot area for storing...
US-9,395,998 Selectively controlling instruction execution in transactional processing
Execution of instructions in a transactional environment is selectively controlled. A TRANSACTION BEGIN instruction initiates a transaction and includes...
US-9,395,997 Request coalescing for instruction streams
Sequential fetch requests from a set of fetch requests are combined into longer coalesced requests that match the width of a system memory interface in order to...
US-9,395,996 Pipelining out-of-order instructions
Systems, methods and computer program product provide for pipelining out-of-order instructions. Embodiments comprise an instruction reservation station for...
US-9,395,995 Retrieving instructions of a single branch, backwards short loop from a virtual loop buffer
A method, system, and computer program product for instruction fetching within a processor instruction unit, utilizing a loop buffer, one or more virtual loop...
US-9,395,994 Embedded branch prediction unit
In accordance with some embodiments of the present invention, a branch prediction unit for an embedded controller may be placed in association with the...
US-9,395,993 Execution-aware memory protection
Execution-Aware Memory protection technologies are described. A processor includes an instruction fetch unit to fetch instructions of applications executing in...
US-9,395,992 Instruction swap for patching problematic instructions in a microprocessor
There is provided a method and system for replacing an instruction with another instruction. A match register stores an opcode that identifies an instruction to...
US-9,395,991 Speculative load issue
A method and load and store buffer for issuing a load instruction to a data cache. The method includes determining whether there are any unresolved store...
US-9,395,990 Mode dependent partial width load to wider register processors, methods, and systems
A method of an aspect is performed by a processor. The method includes receiving a partial width load instruction. The partial width load instruction indicates...
US-9,395,989 Run-time-instrumentation controls emit instruction
Aspects relate to executing a run-time-instrumentation EMIT (RIEMIT) instruction. A processor is configured to capture the run-time-instrumentation information...
US-9,395,988 Micro-ops including packed source and destination fields
A method and apparatus for register packing prior to register renaming in a microprocessor are provided. The method includes: receiving a plurality of micro...
US-9,395,987 Method and device for detecting a race condition
A method for detecting a race condition, comprising storing a seed value to a first global variable D; detecting a race condition when the second global...
US-9,395,986 Compiling method and compiling apparatus
A compiling apparatus detects a plurality of branch instructions, each of which specifies execution of branch processing on the basis of a result of a...
US-9,395,985 Efficient central processing unit (CPU) return address and instruction cache
A processor includes an instruction fetch unit and an instruction decode unit. The instruction fetch unit includes an instruction pre-fetch buffer and is...
US-9,395,984 Swapping branch direction history(ies) in response to a branch prediction table swap instruction(s), and...
Swapping branch direction history(ies) in response to a branch prediction table swap instruction(s), and related systems and methods are disclosed. In one...
US-9,395,983 Debug instruction for execution by a first thread to generate a debug event in a second thread to cause a...
For use in a data processing system comprising a processor configured to execute a first set of instructions corresponding to a first thread and a second set of...
US-9,395,982 Atomic memory operations on an N-way linked list
Computer-implemented methods for pushing or popping an element on to of off of an N-way linked list in a computer memory may include one or more atomic memory...
US-9,395,981 Multi-addressable register files and format conversions associated therewith
A multi-addressable register file is addressed by a plurality of types of instructions, including scalar, vector and vector-scalar extension instructions. It...
US-9,395,980 Residual addition for video software techniques
According to some embodiments, a technique provides for the execution of an instruction that includes receiving residual data of a first image and decoded...
US-9,395,979 Pre-emptive development conflict resolution
A method is provided for managing software. The method comprises: when a first version of a software development file in a first software development zone is...
US-9,395,978 Mobile phone based software processing method and mobile phone
A mobile phone based software processing method recording time information of installation of each software program in a mobile phone; updating the latest time...
US-9,395,977 Locating program code units after software refactoring
Locating program code units stored on digital data storage includes defining a software module fragment by assigning a software module fragment label to...
US-9,395,976 Information processing apparatus, firmware renewing method, and computer program
An invented information processing apparatus includes a firmware renewal unit for renewing the firmware stored in the electronic device to be new firmware, a...
US-9,395,975 Method and system for generating a ROM patch
A method and system for generating a ROM patch are provided. In one embodiment, a computing device obtains an original assembly code and a modified assembly...
US-9,395,974 Mixed operating environment
A method of operating a data center includes providing a first operating environment in a first portion of the data center and providing a second operating...
US-9,395,973 Virtual machine deployment method, recording medium, and information processing apparatus
An information processing apparatus 10 specifies a second virtual machine that provides a service on which a first virtual machine depends. The information...
US-9,395,972 Customizing an operating system installer via a web-based interface
A mechanism for customizing an operating system installer via a web-based interface is disclosed. A method of the invention includes providing a web-based...
US-9,395,971 Complex computer environment installation
An install request including a hierarchy of a complex computer environment is received, wherein the hierarchy comprises a first component needed on the first...
US-9,395,970 Method and apparatus for providing a time period for starting an application
Disclosed are methods and systems for determining the time for a remote computer to begin executing an application downloaded over a network. A portion of the...
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