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Patent # Description
US-9,401,733 Electronic device enclosure
An electronic device enclosure which includes a front surface, a back surface opposite to the front surface, and a lateral edge connected with the front...
US-9,401,732 Receiver and receiving method of receiver
Embodiments of the present invention provide a receiver and a receiving method of the receiver, so that monolithic integration of multiple receiving channels...
US-9,401,731 Skew control for three-phase communication
Aspects disclosed in the detailed description include skew control for three-phase communication. A three-phase communication involves three signal branches. A...
US-9,401,730 Two way radio and peripheral devices
A two way radio includes a first push to talk button and a second push to talk button. The first push to talk button is configured to cause transmission of a...
US-9,401,729 Maintaining running disparity while utilizing different line-codes
Methods and systems for encoding a frame utilizing at least two line-codes having different minimal Hamming distances. The method includes maintaining over the...
US-9,401,728 Test signal generator for sigma-delta ADC
The test signal generator generates an analog and digital test signals to test a sigma-delta ADC which has an analog portion succeeded by a digital decimation...
US-9,401,727 Shared circuit configurations for bootstrapped sample and hold circuits in a time-interleaved analog to digital...
In a time-interleaved Analog to Digital Converter, circuit components and capacitances may be shared among a plurality of sample and hold circuits in each of...
US-9,401,726 Background calibration of time-interleaved analog-to-digital converters
A robust and fast background calibration technique for correction of time-interleaved ADC offset, gain, bandwidth, and timing mismatches is proposed. The...
US-9,401,725 Suppressing offset, offset drift, and 1/f noise during analog/digital conversion
A circuit arrangement is provided for suppressing offset, offset drift, and 1/f noise during analog/digital conversion. The arrangement includes an...
US-9,401,724 Frequency synthesizers with amplitude control
A frequency synthesizer device provides amplitude control. Using switch circuit operating in a first mode, a charge voltage is applied to an oscillator circuit...
US-9,401,723 XOR phase detector, phase-locked loop, and method of operating a PLL
An XOR phase detector for a phase-locked loop PLL comprises an XOR gate which has an input for a periodic reference signal and another input connected to a...
US-9,401,722 Autoconfigurable phase-locked loop which automatically maintains a constant damping factor and adjusts the loop...
A phase-locked loop (PLL) includes a state machine programmed to automatically produce a set of control signals to select a charge-pump current and integrating...
US-9,401,721 Reference voltage generation and tuning
A data recovery circuit includes a comparator for providing a comparator output signal in response to a difference in voltage between a data input signal and...
US-9,401,720 Circuit arrangement and method for clock and/or data recovery
In order to provide a circuit arrangement (100) and also a method for clock and/or data recovery (CDR) having low power consumption, having low power loss and...
US-9,401,719 Oscillator circuit and method of providing temperature compensation therefor
An oscillator circuit comprising at least a first component arranged to be statically calibrated to calibrate the oscillator circuit to achieve a symmetrical...
US-9,401,718 Heterogeneous programmable device and configuration software adapted therefor
A method of configuring a programmable integrated circuit device with a user logic design includes analyzing the user logic design to identify unidirectional...
US-9,401,717 Flexible, space-efficient I/O circuitry for integrated circuits
Flexible, space-efficient I/O architectures for integrated circuits simplify circuit design and shorten design times. In one aspect, cells for power supply pads...
US-9,401,716 Logic gate using schmitt trigger circuit
Logic gates using Schmitt trigger circuits are provided. An AND gate using the Schmitt trigger circuit includes: a NAND gate configured to receive two input...
US-9,401,715 Conditional pulse generator circuit for low power pulse triggered flip flop
An electronic device includes a pulsed latch circuit configured to latch a data input signal to an output based upon receipt of a pulse signal. A pulse...
US-9,401,714 Programmable logic device
To obtain a PLD that achieves high-speed configuration capable of dynamic configuration, consumes less power, and has a short startup time and a PLD that has a...
US-9,401,713 Keyboard assembly including an electromagnet
A keyboard assembly includes a plurality of keys, a key actuation mechanism to move at least one of the keys, the key actuation mechanism including an...
US-9,401,712 Touch panel substrate with first grid electrodes and second grid electrodes
Provided is a touch panel substrate to be used in a touch panel, the touch panel substrate having improved display qualities. A touch panel substrate of one...
US-9,401,711 Driver output with dynamic switching bias
A circuit of an output stage of a push-pull driver having dynamic biasing may include a stacked configuration of field effect transistors (PFETs) having a first...
US-9,401,710 Active diode having improved transistor turn-off control method
An active diode that features improved control of transistor turn-off is provided. Such an active diode may include a comparator to compare voltages between...
US-9,401,709 Control circuit for management engine interface
A control circuit includes a platform controller hub (PCH), a basic input/output system (BIOS), an electronic switch, and first and second resistors. A...
US-9,401,708 Gate drive unit and method for controlling a gate drive unit
A gate drive unit includes a charging device, a switch, and a timing module. The charging device is conductively coupled with an electrical energy source and a...
US-9,401,707 Push-pull voltage driver with low static current variation
A push-pull driver is provided with a differential amplifier that amplifies a difference between an input voltage and an output voltage to drive a bias node...
US-9,401,706 Apparatus, system and method for providing switching with a T-coil circuit
Techniques and mechanisms for switching between a plurality of inputs each to receive a respective analog signal to be transmitted. In an embodiment, switch...
US-9,401,705 Gate driving device
The present invention copes with fluctuations in a power supply voltage when a capacitor for coping with fluctuations in the power supply voltage has been...
US-9,401,704 Active matrix panel, detection apparatus and detection system
An active matrix panel includes a gate line connected to control electrodes of a plurality of transistors; and a drive circuit supplying the gate line with a...
US-9,401,703 Variable frequency relaxation oscillator
A relaxation oscillator system has a relaxation oscillator and a frequency control (FC) unit. The oscillator includes first and second oscillator sub-circuits...
US-9,401,702 Binary frequency shift keying with data modulated in digital domain and carrier generated from intermediate...
Binary frequency shift keying modulation is implemented by choosing appropriate phases of a high frequency clock to generate a modulated intermediate clock...
US-9,401,701 Time signal generating circuit and time signal generating method
A time signal generating circuit and a time signal generating method are provided. The time signal generating method includes following steps: getting a first...
US-9,401,700 High speed latch and method
An embodiment latch device includes a first stage having circuitry that receives a differential input and generates a clocked data signal according to a clock...
US-9,401,699 High frequency low-gain noise ring-type VCO oscillator leading to a low-noise/area PLL
A phase locked loop includes a voltage-controlled oscillator and a current mirror circuit that supplies a drive current to the voltage-controlled oscillator....
US-9,401,698 Transforming a phase-locked-loop generated chip clock signal to a local clock signal
Electronic circuits and memory circuits are provided for implementing a method for transforming a chip clock signal to a local clock signal. The method...
US-9,401,697 Device for generating an alternating voltage difference between the reference potentials of electronic systems
The present invention relates to a device for generating an alternating voltage difference between a first and second reference potential. The device comprises:...
US-9,401,696 Boosting varactor capacitance ratio
A voltage controlled oscillator comprises a negative resistance, a first inductor, a fixed capacitor, and a frequency control component. The frequency control...
US-9,401,695 Immittance conversion circuit and filter
An immittance conversion circuit includes a first terminal and a second terminal, and includes: a conversion target circuit configured to amplify or attenuate a...
US-9,401,694 Operational transconductance amplifier, operational transconductance amplifier-capacitor filter and high order...
An operational transconductance amplifier includes a fully-differential amplifying circuit, a bias driving circuit, and a common mode feedback circuit. The...
US-9,401,693 Methods and apparatus for temperature control of devices and mechanical resonating structures
Methods and apparatus for temperature control of devices and mechanical resonating structures are described. A mechanical resonating structure may include a...
US-9,401,692 Acoustic resonator having collar structure
A bulk acoustic wave (BAW) resonator structure comprises a first electrode disposed over a substrate, a first piezoelectric layer disposed over the first...
US-9,401,691 Acoustic resonator device with air-ring and temperature compensating layer
A bulk acoustic wave (BAW) resonator device includes a substrate defining a cavity, a bottom electrode formed over the substrate and at least a portion of the...
US-9,401,690 Calibration circuit and method
A circuit comprises a phase combiner and four output ports. The phase combiner adds an in-phase positive input and a quadrature positive input to obtain an...
US-9,401,689 Tunable diplexers in three-dimensional (3D) integrated circuits (IC) (3DIC) and related components and methods
Tunable diplexers in three-dimensional (3D) integrated circuits (IC) (3DIC) are disclosed. In one embodiment, the tunable diplexer may be formed by providing...
US-9,401,688 Passive equalizer
A first meander line 1A is formed on one surface of a first dielectric layer 9A, with one end as a signal input position, and the other end connected to a first...
US-9,401,687 Voice alarm amplifier
An emergency message output amplifier includes a plurality of audio output channels. Channels can be combined together to increase output power, and can be...
US-9,401,686 Volume control assembly
A volume control assembly includes a housing that may be positioned proximate an external electronic device. A processor is coupled to the housing. A loud...
US-9,401,685 Systems and methods for adjusting automatic gain control
Automatic gain control systems disclosed herein can incorporate a confidence metric that can estimate the accuracy of gain adjustments calculated by an...
US-9,401,684 Methods, systems, and computer readable media for synthesizing sounds using estimated material parameters
The subject matter described herein includes methods, systems, and computer readable media for synthesizing sounds using estimated material parameters....
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