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Solid-state image pickup device
A portion on the light exit end surface side of a fiber optic plate includes a first portion and a second portion. The first portion corresponds to a peripheral...
Backside structure and methods for BSI image sensors
A back side image sensor and method of manufacture are provided. In an embodiment a bottom anti-reflective coating is formed over a substrate, and a metal...
Image sensor module and method for producing such a module
An image sensor module includes an image sensor bearer and an image sensor, the image sensor bearer being fashioned as an injection-molded circuit bearer, and...
Solid-state imaging device and method for manufacturing solid-state
According to one embodiment, a solid-state imaging device is provided. The solid-state imaging device includes a photoelectric conversion element, a floating...
Infrared detector made up of suspended bolometric micro-plates
An array bolometric detector for detecting an electromagnetic radiation in a predetermined infrared or terahertz wavelength range, including a substrate, and an...
Thin film transistor and active matrix organic light emitting diode
assembly and method for manufacturing the same
The present application provides a thin film transistor, an active matrix organic light emitting diode assembly and a method for manufacturing the same. The...
Display panel and display device
A display panel and a display are disclosed. A display panel has an active area and a peripheral area disposed adjacent to the active area and comprises a first...
Pixel structure, dual gate pixel structure and display device
According to the present disclosure, there are disclosed a pixel structure, a dual-gate pixel structure and a display device. The pixel structure comprises: a...
Multi-fin finFETs with merged-fin source/drains and replacement gates
A semiconductor structure including semiconductor fins, a gate over a middle portion of the semiconductor fins, and faceted semiconductor regions outside of the...
Dual isolation on SSOI wafer
A method of forming fins in a dual isolation complimentary-metal-oxide-semiconductor (CMOS) device that includes a p-type field effect transistor device (pFET)...
Sacrificial spin-on glass for air gap formation after bl isolation process
in single gate vertical channel 3D...
A method for manufacturing a memory device, which can be configured as a 3D NAND flash memory, and includes a plurality of stacks of conductive strips,...
Non-volatile memory device and method for fabricating the same
A three-dimensional non-volatile memory device that may increase erase operation efficiency during an erase operation using Gate-Induced Drain Leakage (GIDL)...
Memory device and method for fabricating the same
A memory device comprises plural of silicon-containing layers, string select lines (SSLs), strings, bit lines, metal strapped word lines and plural sets of...
Memory device and method for forming the same
Various embodiments provide memory devices and methods for forming the same. A substrate is provided, the substrate having one or more adjacent memory cells...
Nonvolatile memory cell with improved isolation structures
An array of floating gate transistors of a non-volatile memory, NVM, cell includes floating gate transistors separated from one another by high-concentration...
Layout pattern for 8T-SRAM and the manufacturing method thereof
The present invention provides a layout pattern of an 8-transistor static random access memory (8T-SRAM), at least including a first diffusion region, a second...
Epitaxial source/drain differential spacers
A process of forming an integrated circuit containing a first transistor and a second transistor of the same polarity, by forming an epitaxial spacer layer over...
Semiconductor device, electronic component, and electronic device
A semiconductor device has a function of storing data and includes an output terminal, a first terminal, a second terminal, a first circuit, and second...
Vertical transistor devices, memory arrays, and methods of forming
vertical transistor devices
A vertical transistor device includes a line of active area adjacent a line of dielectric isolation. A buried data/sense line obliquely angles relative to the...
Multiple threshold voltage semiconductor device
In one aspect there is set forth herein a semiconductor device having a first field effect transistor formed in a substrate structure, a second field effect...
Semiconductor arrangement having first semiconductor device over first
shallow well having first conductivity...
A semiconductor arrangement and method of formation are provided. A semiconductor arrangement includes a first semiconductor device adjacent a second...
Semiconductor devices including etching stop films
A semiconductor device may include a substrate including an NMOS region and a PMOS region. A gate structure can include a gate pattern and a spacer pattern,...
A method of manufacturing a semiconductor device includes forming a gate structure through a first insulating interlayer on a substrate such that the gate...
Semiconductor device structure
A semiconductor device structure having at least one thin-film resistor structure is provided. Through the metal plug(s) or metal wirings located on different...
Directional FinFET capacitor structures
A method for fabricating a capacitor within a FinFET device includes patterning a first gate interconnect material having a first recess. The method also...
Power circuit, control method, power system, and package structure of
A power circuit, control method, power system, and package structure of power circuit are disclosed. The power circuit includes a quasi-cascade power unit. The...
Semiconductor device including a diode arranged in a trench
One embodiment of an integrated circuit includes a semiconductor body. In the semiconductor body a first trench region extends into the semiconductor body from...
Display panel having a reduced dead space
A display panel includes a substrate including a display area displaying an image and a peripheral area. A plurality of shorting bar connection parts are formed...
Interposer integrated with 3D passive devices
An integrated interposer includes an interposer substrate including at least a first portion of a 3D passive device within an active region of the interposer...
Field-effect device and manufacturing method thereof
Embodiments relate to a field-effect device that includes a body region, a first source/drain region of a first conductivity type, a second source/drain region,...
Electronic device for ESD protection
An electronic device includes a thyristor having an anode, a cathode, a first bipolar transistor disposed on the anode side. A second bipolar transistor is...
Package-on-package (POP) structure including multiple dies
A package-on-package (POP) structure is disclosed. The POP structure includes a first die, a second die, and a photo-imaged dielectric (PID) layer. The PID...
Stack of integrated-circuit chips and electronic device
A stack of chips is formed by a first integrated-circuit chip and a second integrated-circuit chip. The chips have opposing faces which are separated from each...
Method of making a substrate structure having a flexible layer
There is provided a semiconductor light emitting device including: a heat dissipation structure including one or more of materials among a metal, a ceramic, a...
Semiconductor device and method of forming a shielding layer over a
semiconductor die disposed in a cavity of...
A semiconductor device has an interconnect structure with a cavity formed partially through the interconnect structure. A first semiconductor die is mounted in...
Optical bus in 3D integrated circuit stack
An optical bus of an integrated circuit comprises: a polymer waveguide, a micromirror, and an optical coupler. The polymer waveguide is disposed in a via formed...
Semiconductor device package with organic interposer
A method of making an integrated circuit package, such as a ball grid array, includes providing a flexible tape that has first and second sets of bond pads on...
Substrates with transferable chiplets
A method for fabricating a substrate having transferable chiplets includes forming a photo-sensitive adhesive layer on a process side of a source substrate...
Method of processing a semiconductor wafer
A method of processing a semiconductor wafer includes forming semiconductor dies in the semiconductor wafer, each die having an active region containing devices...
Semiconductor package having wire bond wall to reduce coupling
A system and method for a package including a wire bond wall to reduce coupling is presented. The package includes a substrate, and a first circuit on the...
Electronic devices and components for high efficiency power circuits
An electronic component includes a III-N transistor and a III-N rectifying device both encased in a single package. A gate electrode of the III-N transistor is...
Semiconductor device and ceramic circuit substrate, and producing method
of semiconductor device
A semiconductor device comprises a circuit layer composed of a conductive material, and a semiconductor element mounted on the circuit layer, wherein an...
Wafer level packages having non-wettable solder collars and methods for
the fabrication thereof
Wafer level packages and methods for producing wafer level packages having non-wettable solder collars are provided. In one embodiment, the method includes...
Electronic devices with embedded die interconnect structures, and methods
of manufacture thereof
An embodiment of an electronic device includes an IC die with a top surface and a bond pad exposed at the top surface. A stud bump (or stack of stud bumps) is...
Molding structure for wafer level package
Apparatus, and methods of manufacture thereof, in which a molding compound is formed between spaced apart microelectronic devices. The molding compound...
Dual layer stack for contact formation
A semiconductor structures includes a contact fabricated utilizing a multi material trench-layer. The multi material trench layer is utilized to form a contact...
Semiconductor device and electronic apparatus
A semiconductor device that is connected to a wiring substrate includes a semiconductor substrate, a circuit provided on the semiconductor substrate, a...
Preventing unauthorized use of integrated circuits for radiation-hard
An integrated circuit, a method of forming an integrated circuit, and a semiconductor are disclosed for preventing unauthorized use in radiation-hard...
According to one embodiment, a semiconductor device includes a circuit substrate, a semiconductor element, a sealing resin layer, and a conductive shielding...
Method for manufacturing semiconductor device and alignment mark of
According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can include forming a stacked layer in a memory cell...