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Patent # Description
US-9,400,722 Method of providing high integrity processing
A method of providing high integrity communication in a high integrity processing system having at least two redundant application processors in a non-lockstep...
US-9,400,721 Error correction code seeding
The technology disclosed herein provides a method of verifying data read from a data block when the cell number of the data block does not match an ECC value...
US-9,400,720 Flexible high availability disaster recovery with a set of database servers
Seamless failover in a database replication environment which has a primary database server and a plurality of standby database servers, is described. An...
US-9,400,719 Recovery of a transaction after XA end
Embodiments of the present invention disclose a method for recovery of a two-phase commit transaction. A computer transmits a first transaction identifier to a...
US-9,400,718 Multi-tenant disaster recovery management system and method for intelligently and optimally allocating...
A Multi-Tenant Disaster Recovery Management System and method for intelligently and optimally allocating computing resources between multiple subscribers, the...
US-9,400,717 Synchronization of storage using comparisons of fingerprints of blocks
A system for processing data comprises a deduplicating system, an interface, and a processor. The deduplicating system stores a copy of data stored in a data...
US-9,400,716 Method for handling interrupted writes using multiple cores
An apparatus including a storage array, a primary controller, a secondary controller and a solid state device. The storage array may be configured to be...
US-9,400,715 System and method for interconnecting storage elements
In one embodiment, a method includes receiving data. The method further includes splitting the data into a plurality of fixed-size blocks. Each block comprises...
US-9,400,714 Wirelessly communicating a data file
A method begins by a dispersed storage (DS) processing module sending a plurality of undecodeable portions of a plurality of data files via a public wireless...
US-9,400,713 System and method for pre-encoding of data for direct write to multi-level cell memory
A method and system for reducing data transfers between memory controller and multi-level cell (MLC) non-volatile memory during programming passes of a word...
US-9,400,712 Memory device and erasing method thereof
An erasing method of a memory device is provided. The memory device includes a memory controller and a memory array having a first memory region and a second...
US-9,400,711 Content addressable memory with error detection
A content addressable memory (CAM) includes a first entry which includes one or more bits, a second entry which includes one or more bits, first comparison...
US-9,400,710 Redundant data storage schemes for multi-die memory systems
A method for data storage includes storing data in a memory that includes one or more memory units, each memory unit including memory blocks. The stored data is...
US-9,400,709 Information processing apparatus, and method for restarting input/output control portion
An information processing apparatus according to one aspect of the present disclosure includes an input/output control portion and a restart control portion....
US-9,400,708 Integrated circuit and method of detecting a data integrity error
An integrated circuit comprises a write bus coupled to a register for storing control data. A storage unit is arranged to store reference signature data...
US-9,400,707 Error detection or correction of stored signals after one or more heat events in one or more memory devices
The present disclosure includes methods, devices, and systems for error detection or correction of stored signals in memory devices. An example method includes...
US-9,400,706 Method and device for monitoring an adaptive network
An adaptive network has respective network nodes and network connections between the network nodes, the network nodes each having a transceiver which is coupled...
US-9,400,705 Hardwired remapped memory
Subject matter disclosed herein relates to on-the-fly remapping a memory device by hardware-switching data paths to locations of the memory device.
US-9,400,704 Implementing distributed debug data collection and analysis for a shared adapter in a virtualized system
A method, system and computer program product are provided for implementing distributed debug data collection and analysis for a hardware I/O adapter, such as,...
US-9,400,703 Method and system for transforming input data streams
A system and method for processing an input data stream in a first data format of a plurality of first data formats to an output data stream in a second data...
US-9,400,702 Shared virtual memory
Embodiments of the invention provide a programming model for CPU-GPU platforms. In particular, embodiments of the invention provide a uniform programming model...
US-9,400,701 Technology for stall detection
Detecting stalling of a software process in a computer system includes receiving identification of a task thread group executing in a work process executing on...
US-9,400,700 Optimized system for analytics (graphs and sparse matrices) operations
A graph processing system includes a graph API (Application Program Interface), as executed on a processor of a computer and as capable of implementing any of a...
US-9,400,699 Data communication between modules
A method is proposed for exchanging a data set between a transmitting module, associated with a first domain, and a destination module associated with a second...
US-9,400,698 Portable electronic apparatus and portable cloud computing system
A portable electronic apparatus includes an operating system comprising an application layer, an application framework layer, a libraries layer and a kernel...
US-9,400,697 Multi-dimensional computing and communication resource allocation using bin-packing with per-branch combination...
A recursive solution to a bin-packing algorithm provides efficient allocation of computing or communications resources to resource consumers in a computer or...
US-9,400,696 Execution of real time applications with an automation controller
A method and system are provided for performing the computational execution of automation tasks with automation devices by combining one or more central...
US-9,400,695 Low latency rendering of objects
A system is disclosed for rendering low latency resource objects by providing the latest position data from a central processing unit for the low latency...
US-9,400,694 Prioritizing instances of programs for execution based on input data availability
Systems and methods provide an extensible, multi-stage, realtime application program processing load adaptive, manycore data processing architecture shared...
US-9,400,693 Controlling application programs based on memory usage of a process and right of application programs to use...
An apparatus includes a monitoring unit configured to monitor memory usage of a process in which multiple application programs are running, and a control unit...
US-9,400,692 System and method for managing the allocating and freeing of objects in a multi-threaded system
A memory management system for managing objects which represent memory in a multi-threaded operating system extracts the ID of the home free-list from the...
US-9,400,691 Process allocation management apparatus, system and method
In the present invention, a management apparatus includes a unit configured to store management information including a throughput of each of a plurality of...
US-9,400,690 Dynamically modifying program execution capacity
Techniques are described for managing program execution capacity, such as for a group of computing nodes that are provided for executing one or more programs...
US-9,400,689 Resource allocation/de-allocation and activation/deactivation
A computer-implemented method, carried out by one or more processors, for managing resources in a server environment. In an embodiment, the method includes...
US-9,400,688 Resource restriction systems and methods
Resource restrictions are associated with a user identifier. A resource restriction agent receives operating system calls related for resources and provides...
US-9,400,687 Method and system for dynamic pool reallocation
Dynamic pool reallocation performed by the following steps: (i) defining a plurality of resource pools including a first pool and a second pool, where each...
US-9,400,686 Process grouping for improved cache and memory affinity
A multiprocessor computer system and method for use therein are provided for assigning processes to processor nodes. The system can determine a first pair of...
US-9,400,685 Dividing, scheduling, and parallel processing compiled sub-tasks on an asynchronous multi-core processor
An asynchronous multiple-core processor may be adapted for carrying out sets of known tasks, such as the tasks in the LAPACK and BLAS packages. Conveniently,...
US-9,400,684 Electronic apparatus, recording medium, and method for generating workflow
An electronic apparatus generates a workflow for processing data with a plurality of functions in combination. The electronic apparatus includes a function...
US-9,400,683 Optimizing execution of processes
Methods and system for optimizing an execution of a business process are disclosed. In one aspect, a request to execute a business process is received. The...
US-9,400,682 Ranking and scheduling of monitoring tasks
Systems, methods, and machine-readable and executable instructions are provided for dynamically ranking and scheduling monitoring tasks. Dynamically ranking and...
US-9,400,681 Managing scheduled tasks within a virtual space
Tasks scheduled to be performed at future times within a virtual space may be managed. Selections of one or more tasks performable within the virtual space may...
US-9,400,680 Transportation network micro-simulation with pre-emptive decomposition
In a parallel computing method performed by a parallel computing system comprising a plurality of central processing units (CPUs), a main process executes....
US-9,400,679 Methods for selectively enabling and disabling hardware features
In one embodiment, a method includes defining a hardware feature policy for one or more hardware components of a system; and enabling and/or disabling one or...
US-9,400,678 Systems for selectively enabling and disabling hardware features
In one embodiment, a system includes a processor and logic integrated with and/or executable by the processor. The logic is adapted to: define a hardware...
US-9,400,677 Adaptive handling of priority inversions using transactions
An operating system of a data processing system receives a request from a first process to acquire an exclusive lock for accessing a resource of the data...
US-9,400,676 Preferential CPU utilization for tasks
In a distributed server storage environment, a set of like tasks to be performed is organized into a first group, and a last used processing group associated...
US-9,400,675 Tagging virtual machine instances based on commands
Aspects of the present disclosure are directed towards a method of receiving a first command for a virtual machine (VM) instance. This includes performing...
US-9,400,674 Managing virtual machine instances utilizing a virtual offload device
Generally described, the present application relates to systems and methods for the managing virtual machines instances using a physical computing device and an...
US-9,400,673 Placement of virtual CPUS using a hardware multithreading parameter
A cloud manager monitors available resources on host computer systems, including a number of hardware threads supported by CPUs on the host computer systems....
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