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Patent # Description
US-9,406,671 Capacitor arrays for minimizing gradient effects and methods of forming the same
Semiconductor devices having capacitor arrays. A semiconductor device is formed including a capacitor array formed in a plurality of cells in a two-dimensional...
US-9,406,670 System comprising a semiconductor device and structure
A semiconductor device, including: a first layer including first transistors, the first transistors are interconnected by at least one metal layer including...
US-9,406,669 Method and structure for vertical tunneling field effect transistor and planar devices
The present disclosure provides one embodiment of a method of forming a tunnel field effect transistor (TFET). The method includes forming a semiconductor mesa...
US-9,406,668 Power semiconductor element
A power semiconductor element includes: a main transistor including a first gate electrode, a first drain electrode, and a first source electrode; a sensor...
US-9,406,667 Latch-up immunity nLDMOS
An improved nLDMOS ESD protection device having an increased holding voltage is disclosed. Embodiments include: providing in a substrate a DVNW region;...
US-9,406,666 Semiconductor device
A protective diode is provided above a first guard ring region which surrounds an active region, with a field oxide film interposed there between. The...
US-9,406,665 Integrated passive devices for finFET technologies
Integrated passive devices for silicon on insulator (SOI) FinFET technologies and methods of manufacture are disclosed. The method includes forming a passive...
US-9,406,664 Array substrate, method for fabricating the same and display device
An array substrate, a method for fabricating the same and a display device are disclosed. The array substrate comprises a display region, at least two common...
US-9,406,663 Semiconductor devices
Semiconductor devices include a first gate pattern provided on the first active region, a second gate pattern over the first active region, a third gate pattern...
US-9,406,662 Flip-chip assembly process comprising pre-coating interconnect elements
A method of assembling a first and a second electronic components includes forming connection elements on an assembly surface of the first component and forming...
US-9,406,661 Protection circuit including vertical gallium nitride schottky diode and PN junction diode
A circuit includes a vertical conduction gallium nitride-based Schottky diode and a vertical conduction silicon based PN junction diode connected in parallel....
US-9,406,660 Stacked semiconductor die assemblies with die support members and associated systems and methods
Stacked semiconductor die assemblies with die support members and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die...
US-9,406,659 Transistor arrangement
A transistor arrangement comprising an electrically conductive substrate; a semiconductor body including a transistor structure, the transistor structure...
US-9,406,658 Embedded component device and manufacturing methods thereof
An embedded component device includes an electronic component including an electrical contact, an upper patterned conductive layer, a dielectric layer between...
US-9,406,657 Semiconductor light-emitting device
A semiconductor light-emitting device has a substrate, one or more semiconductor light-emitting elements provided on the substrate, and that emit light having a...
US-9,406,656 Display device using semiconductor light emitting device and method of fabricating the same
A display device includes a first electrode; a second electrode; and a plurality of semiconductor light emitting devices coupled to a conductive adhesive layer,...
US-9,406,655 Light emitting diode packaging structure and liquid crystal display device
A light emitting diode packaging structure is disclosed, which has a first cup, a second cup, and a holder carried the first cup and the second cup; a blue...
US-9,406,654 Package for high-power LED devices
Packages for LED-based light devices include interface structures that can facilitate heat transfer from the package to a heat sink. The package can include...
US-9,406,653 Integrated solution for solid state light sources in a process chamber
Apparatus for providing pulsed or continuous energy in a process chamber, and methods of fabricated said apparatus, are provided herein. The apparatus may...
US-9,406,652 Stack memory
A semiconductor memory is formed by stacking a plurality of substrates and memory cells on each substrate are connected by data dump lines. A switch may...
US-9,406,651 Chip stack with oleic acid-aligned nanotubes in thermal interface material
The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and...
US-9,406,650 Methods of packaging semiconductor devices and packaged semiconductor devices
Methods of packaging semiconductor devices and packaged semiconductor devices are disclosed. In some embodiments, a method of packaging semiconductor devices...
US-9,406,649 Stacked multi-chip integrated circuit package
A multi-chip integrated circuit (IC) package is provided which is configured to protect against failure due to warpage. The IC package may comprise a substrate,...
US-9,406,648 Power supply arrangement for semiconductor device
A semiconductor device includes a device die, a first power supply die, and a second power supply die different from the first power supply die. The device die...
US-9,406,647 Extended redistribution layers bumped wafer
A semiconductor device is manufactured by, first, providing a wafer, designated with a saw street guide, and having a bond pad formed on an active surface of...
US-9,406,646 Electronic device and method for fabricating an electronic device
An embodiment electronic device comprises a semiconductor chip including a first main face, a second main face and side faces each connecting the first main...
US-9,406,645 Wafer level package and fabrication method
A method of forming an electronic component package includes coupling a first surface of an electronic component to a first surface of a first dielectric strip,...
US-9,406,644 Chip separation process for photochemical component printing
Parallel transfers of components from donor plates to chip modules can be performed with a single alignment step, after arranging the components to have the...
US-9,406,642 Integrated circuit packaging system with insulated trace and method of manufacture thereof
An integrated circuit packaging system and method of manufacture thereof includes: a substrate; a plain trace on the substrate; an insulated trace on the...
US-9,406,641 Compound carrier board structure of flip-chip chip-scale package and manufacturing method thereof
A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate having a flip region with a...
US-9,406,640 Flip chip bonder and method of correcting flatness and deformation amount of bonding stage
Provided is a flip chip bonder including: a base (12); a bonding stage (20); a plurality of vertical-position adjustment support mechanisms (30) attached to the...
US-9,406,639 Semiconductor package and manufacturing method thereof
A semiconductor package and manufacturing method thereof are disclosed and may include a first semiconductor device comprising a first bond pad on a first...
US-9,406,638 Semiconductor device and manufacturing method thereof
Provided are a semiconductor device and a method of manufacturing the same. A carrier is removed after a first semiconductor die and a second semiconductor die...
US-9,406,637 Semiconductor construct and manufacturing method thereof as well as semiconductor device and manufacturing...
A semiconductor construct includes a semiconductor substrate and connection pads provided on the semiconductor substrate. Some of the connection pads are...
US-9,406,636 Interposer package-on-package structure
An integrated circuit (IC) package includes an IC die having a first surface and a second surface opposite of the first surface. The IC package includes first...
US-9,406,635 Semiconductor light emitting device and semiconductor light emitting device package using the same
A semiconductor light emitting device includes a multi-region solder pad. The semiconductor light emitting device includes a light emitting diode (LED) chip...
US-9,406,634 Package structure and method of forming the same
A package includes a first work piece with a metal trace on a surface of the first work piece, wherein the metal trace has a first axis, wherein the first work...
US-9,406,633 Contact component and semiconductor module
A contact component adapted to be soldered onto a metal region provided on an insulating substrate of a semiconductor module includes a cylindrical portion; a...
US-9,406,632 Semiconductor package including a substrate with a stepped sidewall structure
A semiconductor package includes a passivation layer overlying a semiconductor substrate, a pillar bump overlying the passivation layer, and a molding compound...
US-9,406,631 Semiconductor chip having different conductive pad widths and method of making layout for same
A semiconductor chip includes a first conductive pad, a second conductive pad and a third conductive pad. The semiconductor chip also includes a first under...
US-9,406,630 Contact portion of wire and manufacturing method thereof
A contact portion of wiring and a method of manufacturing the same are disclosed. A contact portion of wiring according to an embodiment includes: a substrate;...
US-9,406,629 Semiconductor package structure and manufacturing method thereof
A semiconductor package structure includes a first semiconductor substrate including a conductive pad; and a conductive pillar on the conductive pad and...
US-9,406,628 Semiconductor device and method of manufacturing the same
A semiconductor device in which reliability of a bonding pad to which a conductive wire is bonded is achieved. A bonding pad having an OPM structure is formed...
US-9,406,627 Mixed mode RC clamps
A system interconnect includes a first resistor-capacitor (RC) clamp having a first RC time constant. The system interconnect also includes second RC clamps...
US-9,406,626 Semiconductor device and method fabricating the same
According to an exemplary embodiment, a semiconductor device is provided. The semiconductor device includes a first seal ring and a first circuit. The first...
US-9,406,625 Die edge seal employing low-K dielectric material
A semiconductor wafer has a multi-stage structure that damps and contains nascent cracks generated during dicing and inhibits moisture penetration into the...
US-9,406,624 Semiconductor module and power converter
A semiconductor module includes a case, a semiconductor component provided in the case for switching a current, encapsulating resin provided in the case for...
US-9,406,623 Electromagnetic shield and associated methods
Semiconductor devices are described, along with methods and systems that include them. One such device includes a diffusion region in a semiconductor material,...
US-9,406,622 Electronic circuit and semiconductor component
A circuit board according to an embodiment is one in which a plurality of electronic components is mounted on a printed wiring board. The circuit board includes...
US-9,406,621 Ultraviolet energy shield for non-volatile charge storage memory
An integrated circuit with non-volatile memory cells shielded from ultraviolet light by a shielding structure compatible with chemical-mechanical processing....
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