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A method for fabricating a field effect transistor device includes removing a portion of a first semiconductor layer and a first insulator layer to expose a...
Semiconductor device having diffusion barrier to reduce back channel
A semiconductor-on-insulator (SOI) substrate comprises a bulk semiconductor substrate, a buried insulator layer formed on the bulk substrate and an active...
Semiconductor structure containing low-resistance source and drain
Semiconductor structures having a source contact and a drain contact that exhibit reduced contact resistance and methods of forming the same are disclosed. In...
Method for fabricating multiple transistor devices on a substrate with
varying threshold voltages
Fabrication of a first device on a substrate is performed by exposing a first device region, removing a portion of the substrate to create a trench in the first...
Integration of III-V compound materials on silicon
A method of forming a semiconductor device is provided. The method includes depositing an aluminum-base interlayer on a silicon substrate, the aluminum-base...
Methods for fabricating integrated circuits with semiconductor substrate
Methods for fabricating an integrated circuit are provided herein. In an embodiment, a method for fabricating an integrated circuit includes forming a gate...
Singulation through a masking structure surrounding expitaxial regions
In one embodiment, the semiconductor die includes a selective epitaxial layer including device regions, and a masking structure disposed around sidewalls of the...
Integrated device with defined heat flow
An integrated device includes at least one heat generating component which generates heat when operated, at least one temperature-sensitive component, and one...
Integrated circuit and design structure having reduced through silicon
Embodiments of the invention provide an integrated circuit (IC) having reduced through silicon via (TSV)-induced stresses and related IC design structures and...
Three dimensional integrated circuit integration using dielectric bonding
first and through via formation last
A method of implementing three-dimensional (3D) integration of multiple integrated circuit (IC) devices includes forming a first insulating layer over a first...
Selective local metal cap layer formation for improved electromigration
A method of forming a wiring structure for an integrated circuit device includes forming one or more copper lines within an interlevel dielectric layer (ILD);...
Semiconductor structure and method for forming the same
A semiconductor structure and a method for forming the same are provided. The method includes forming a gate structure over a substrate and forming source and...
Cu wiring fabrication method and storage medium
Cu wiring fabrication method for fabricating Cu wiring with respect to substrate having interlayer dielectric film having trench formed thereon, includes:...
Copper wiring forming method with Ru liner and Cu alloy fill
Provided is a method of forming a copper (Cu) wiring in a recess formed to have a predetermined pattern in an insulating film formed on a surface of a...
Method of making an interconnect device
A semiconductor system includes: providing a dielectric layer; providing a conductor in the dielectric layer, the conductor exposed at the top of the dielectric...
Semiconductor device and fabrication method thereof
A method for forming an interconnect device is provided by the present disclosure. The method includes providing a dielectric layer on a substrate, forming...
Diffusion barrier layer formation
A method of forming a titanium nitride (TiN) diffusion barrier includes exposing a deposition surface to a first pulse of a titanium-containing precursor and to...
Semiconductor devices and methods of fabricating the same
A semiconductor device includes a substrate including a first region and a second region, first conductive patterns disposed on the first region and spaced...
Semiconductor device having conductive via and manufacturing process
In accordance with the present invention, there is provided a semiconductor device comprising a semiconductor die or chip, a package body and a through package...
Method for manufacturing a semiconductor substrate, and method for
manufacturing semiconductor devices...
A method of manufacturing a semiconductor substrate includes providing a semiconductor wafer having a first surface and a second surface opposite the first...
Insulation structure formed in a semiconductor substrate and method for
forming an insulation structure
A method for forming an insulation structure in a semiconductor body includes forming a trench extending from a first surface into a semiconductor body, the...
A planarization process, the process including performing first sputtering on a material layer, with an area of the material layer which has a relatively low...
Formation of isolation surrounding well implantation
Embodiments of present invention provide a method of making well isolations. The method includes forming a hard-mask layer on top of said substrate; forming a...
Techniques for trench isolation using flowable dielectric materials
Techniques are disclosed for providing trench isolation of semiconductive fins using flowable dielectric materials. In accordance with some embodiments, a...
Mechanism for FinFET well doping
The embodiments of mechanisms for doping wells of finFET devices described in this disclosure utilize depositing doped films to dope well regions. The...
Bulk semiconductor fins with self-aligned shallow trench isolation
A silicon-carbon alloy layer and a silicon-germanium alloy layer are sequentially formed on a silicon-containing substrate with epitaxial alignment. Trenches...
Systems and methods for eliminating seams in atomic layer deposition of
silicon dioxide film in gap fill...
A method for filling a trench in a substrate includes partially filling the trench with a first silicon dioxide layer. An amorphous silicon layer is deposited...
Semiconductor power devices and methods of manufacturing the same
A semiconductor power device includes a substrate, a plurality of gate electrode structures, a floating well region and a termination ring region. The substrate...
Retention device and retention method
A holding device including a first sucking section for sucking a wafer (substrate) from a side on which a dicing tape (supporting film) is adhered; a structure...
Compliant bipolar micro device transfer head with silicon electrodes
A compliant bipolar micro device transfer head array and method of forming a compliant bipolar micro device transfer array from an SOI substrate are described....
Self-bias calculation on a substrate in a process chamber with bias power
for single or multiple frequencies
Methods for calculating a self-bias on a substrate in a process chamber may include measuring a DC potential of a substrate disposed on a substrate support of a...
Substrate transfer apparatus
In the substrate holder, while holding a periphery portion of a semiconductor wafer, some of protruding portions having a grass shape on a pad main body hide...
Indexed inline substrate processing tool
In some embodiments, an indexed inline substrate processing tool may include a substrate carrier having a base and pair of opposing substrate supports having...
Cover opening/closing apparatus, thermal processing apparatus using the
same, and cover opening/closing method
Provided is a cover opening/closing apparatus which includes: a wafer conveyance port having an opening edge and configured to be opened/closed by an...
Method and system for manufacturing semiconductor epitaxy structure
A system for manufacturing semiconductor epitaxy structure includes a deposition apparatus, a curvature monitor system and a control unit. The deposition...
Ion injector and lens system for ion beam milling
The embodiments herein relate to methods and apparatus for performing ion etching on a semiconductor substrate, as well as methods for forming such apparatus....
Wet clean process for cleaning plasma processing chamber components
A system and method of cleaning a plasma processing chamber component includes removing the component from the plasma processing chamber, the removed component...
Methods of forming conductive and insulating layers
Methods of forming conductive and insulating layers for semiconductor devices and packages. Substrate is provided with integrated circuit device and...
Interposer having molded low CTE dielectric
A method for making an interconnection component is disclosed, including forming a plurality of metal posts extending away from a reference surface. Each post...
Integrated circuit packaging system with photoimagable dielectric-defined
trace and method of manufacture thereof
A system and method of manufacture of an integrated circuit packaging system includes: a photoimagable dielectric layer having a trace opening for exposing the...
Techniques for fabricating reduced-line-edge-roughness trenches for aspect
The present invention provides ART techniques with reduced LER. In one aspect, a method of ART with reduced LER is provided which includes the steps of:...
Formation of FinFET junction
A finFET structure, and method of forming such structure, in which a germanium enriched nanowire is located in the channel region of the FET, while...
Silicon single crystal wafer, manufacturing method thereof and method of
A silicon single crystal wafer is provided. The silicon single crystal wafer includes an IDP which is divided into an NiG region and an NIDP region, wherein the...
Semiconductor device manufacturing method and related semiconductor wafer
A method for processing a wafer (in a process of manufacturing semiconductor devices) may include the following steps: using a first slurry set to perform a...
Method for patterning contact openings on a substrate
Techniques herein include methods for patterning substrates including methods for patterning contact openings. Using techniques herein, slot contacts and other...
Method for semiconductor manufacturing
A method includes followings operations. A semiconductor substrate is provided. A photoresist is formed on the semiconductor substrate. Dopants are inserted...
Substrate processing method and substrate processing apparatus
A substrate processing method for processing a substrate by supplying a processing gas into a processing chamber and allowing the processing gas to react on the...
Highly selective doped oxide removal method
A method of etching doped silicon oxide on patterned heterogeneous structures is described and includes a gas phase etch using partial remote plasma excitation....
Single platform, multiple cycle spacer deposition and etch
A first portion of a multiple cycle spacer is formed on a sidewall of a patterned feature over a substrate. A spacer layer is deposited on the first portion...
Semiconductor device and method for fabricating the same
A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a plurality of fin shaped structures and an insulating...