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Patent # Description
US-9,406,418 Magnetic exchange coupled core-shell nanomagnets
A permanent magnet is fabricated such that it has a magnetically hard core surrounded by a thin magnetically soft shell. The magnetically hard core provides a...
US-9,406,417 Methods of manufacturing wire, multi-layer wire pre-products and wires
Exemplary methods for manufacturing a wire and resultant wires are disclosed herein. The method includes extruding a receptor cross-linkable polymer that is...
US-9,406,416 Method of producing extremely thick insulation coating on surface of electrical steel
A method of producing an extremely thick insulation coating on a surface of an electrical steel, comprises the following steps: 1) preparing a coating...
US-9,406,415 Method of manufacturing transparent conductive film
A method of manufacturing a transparent conductive film has the steps of: preparing a laminated body in which a transparent conductive layer that is not...
US-9,406,414 Insulated wire for vehicle use and cable for vehicle use
An insulated wire for vehicle use includes a conductor and an insulating layer disposed on an outer circumference of the conductor. The insulating layer...
US-9,406,413 Flame-retardant resin composition for aluminum electric wire and aluminum electric wire using same
The invention relates to a flame-retardant resin composition for an aluminum electric wire, the resin composition comprising: a base resin containing (A) 75 to...
US-9,406,412 Variable pin-hole type collimator and radiation imaging device using the same
The present invention relates to a variable pin-hole type collimator applied to a radiation imaging device. The variable pin-hole type collimator comprises: a...
US-9,406,411 Automatic calibration for device with controlled motion range
An apparatus includes a portion that moves along a guided path and a displacement gauge that outputs readings based on the portion's position on the guided...
US-9,406,410 Nuclear fuel rod and method of manufacturing pellets for such a rod
A new type of nuclear fuel rods. The rod cladding has an elliptical section transverse to its longitudinal direction and each nuclear fuel pellet has a...
US-9,406,409 Managing nuclear reactor spent fuel rods
A spent nuclear fuel rod canister includes a submersible pressure vessel including a casing that defines an interior cavity, the casing including a corrosion...
US-9,406,408 Passive system for cooling the core of a nuclear reactor
A system for passively cooling nuclear fuel in a pressurized water reactor during refueling that employs gravity and alignment of valves using battery reserves...
US-9,406,407 Radioactive capture system for severe accident containment of light water reactors (LWRS), and method thereof
A system and a method for capturing gaseous, particulate and liquid radioactive material released from primary containment of a Light Water Reactor (LWR) during...
US-9,406,406 Control rod with outer hafnium skin
A control rod is used to control the reaction of a nuclear reactor. The control rod comprises one or more internal rodlet(s) and a hafnium skin that serves as...
US-9,406,405 Fusion energy device with internal ion source
An improved fusion reactor design with provision for supplying plasma fuel inside a model reactor without consuming additional power in the process. Embodiments...
US-9,406,404 Column redundancy system for a memory array
A memory array having a main memory array and a redundant memory array. The redundant memory array includes redundant memory arranged in replacement units to...
US-9,406,403 Spare memory external to protected memory
A memory subsystem employs spare memory cells external to one or more memory devices. In some embodiments, a processing system uses the spare memory cells to...
US-9,406,402 Semiconductor memory device and method of operating the same
A semiconductor memory device and a method of operating the same are provided. The method of operating the semiconductor memory device includes detecting a...
US-9,406,401 3-D memory and built-in self-test circuit thereof
A three-dimensional (3-D) memory includes: multiple memory dies, each having at least one memory bank and a built-in self-test (BIST) circuit; and a plurality...
US-9,406,400 Gate driving circuit
An Nth stage shift register of a gate driving circuit includes a pull-up unit for pulling up an Nth stage gate signal of a gate line to a high level voltage...
US-9,406,399 Bidirectional shift register and image display device using the same
A display device including a bidirectional shift register circuit, including: a plurality of cascade-connected register circuits; various circuits for setting...
US-9,406,398 Driver circuit, display device including the driver circuit, and electronic appliance including the display device
An object of the present invention is to provide a driver circuit including a normally-on thin film transistor, which driver circuit ensures a small malfunction...
US-9,406,397 Anti-fuse non-volatile semiconductor memory
One-time programmable (OTP) memory comprises a layer of a first conductivity type formed in an active area in a region of a second conductivity type and gate...
US-9,406,396 Intrinsic memory block health monitoring
A memory system or flash card may monitor the health of memory and the user data stored by detecting and storing a number of bits in error for each block. This...
US-9,406,395 Nonvolatile semiconductor memory device
According to one embodiment, a nonvolatile semiconductor memory device includes a first memory cell and a controller. The controller controls a write operation....
US-9,406,394 Flash memory device using adaptive program verification scheme and related method of operation
A method of programming a flash memory device comprises programming selected memory cells, performing a verification operation to determine whether the selected...
US-9,406,393 Nonvolatile memory devices and program verification methods using one verification voltage to verify memory...
A program verification method is for a nonvolatile memory device which programs a plurality of memory cells. The program verification method includes applying a...
US-9,406,392 Memory system and a programming method thereof
A method of programming a storage device includes determining, at a controller of the storage device, that a first program mode of a plurality of program modes...
US-9,406,391 Method of reducing hot electron injection type of read disturb in dummy memory cells
Read disturb is reduced for dummy memory cells in a charge-trapping memory device such as a 3D memory device. The memory device includes a selected NAND string...
US-9,406,390 Storage device and reliability verification method
A method controlling the execution of a reliability verification operation in a storage device including a nonvolatile memory device includes; determining...
US-9,406,389 Electronically coupling a data line to a source for biasing regardless of states of memory cells coupled to the...
Memory devices and methods are disclosed, such as those facilitating data line shielding by way of capacitive coupling with data lines coupled to a memory...
US-9,406,388 Memory area protection system and methods
In one embodiment, a non-volatile memory device includes a plurality of protection bits denoting that an area of memory in the device must be protected from...
US-9,406,387 Charge redistribution during erase in charge trapping memory
Techniques are provided to accelerate the redistribution of the holes in connection with an erase operation, so that there will be a reduced amount of...
US-9,406,386 Data storage device and operation method thereof
A data storage device includes a nonvolatile memory having a plurality of first memory cells connected to a first word line and a plurality of second memory...
US-9,406,385 Apparatus and method of storing data at a multi-bit storage element
A storage device includes non-volatile memory and a controller. A method performed in the data storage device includes receiving, at the controller, first data...
US-9,406,384 Matching semiconductor circuits
Devices, circuitry, and methods for improving matching between semiconductor circuits are shown and described. Measuring a difference in matching between...
US-9,406,383 Non-volatile memory device and method of programming the same
A non-volatile memory device includes a first word line, a second word line, first memory cells, second memory cells, and an address decoder. The second word...
US-9,406,382 Single poly EEPROM device
The present invention proposes a single poly EEPROM cell including a first control gate capacitor, a first tunnel gate capacitor, a first sense transistor, and...
US-9,406,381 TCAM search unit including a distributor TCAM and DRAM and a method for dividing a database of TCAM rules
A search unit including a distributor TCAM and a DRAM search unit and a method to divide a database of TCAM rules is disclosed. The method includes selecting a...
US-9,406,380 Electronic device
Provided is an electronic device including a semiconductor memory unit. The semiconductor memory unit may include: a storage cell comprising a variable...
US-9,406,379 Resistive random access memory with non-linear current-voltage relationship
Providing for fabrication, construction, and/or assembly of a resistive random access memory (RRAM) cell is described herein. The RRAM cell can exhibit a...
US-9,406,378 Phase change memory with mask receiver
Technology for writing data to a phase change memory array is disclosed. In an example, a method may include identifying mask logic for masking cells in the...
US-9,406,377 Rewritable multibit non-volatile memory with soft decode optimization
A non-volatile memory system including multi-level storage optimized for ramp sensing and soft decoding is provided. Sensing is performed at a higher bit...
US-9,406,376 Motion vector detection apparatus and method
According to one embodiment, a motion vector detection apparatus includes following units. The layering unit generates layers with different resolutions for...
US-9,406,375 Write address synchronization in 2 read/1write SRAM arrays
An aspect relates to a memory array that includes at least a first and a second six transistor static random access memory cell, and first and second address...
US-9,406,374 Mitigating leakage in memory circuits
An apparatus includes a memory circuit and a word-line driver circuit. The memory circuit includes a plurality of rows of memory cells, each memory cell in a...
US-9,406,373 Memory array and method of operating the same
A memory array includes an array of memory cells. The memory array further includes at least two read tracking cells in a read tracking column. The memory array...
US-9,406,372 Secure non-volatile memory
A secure memory includes a bistable memory cell having a programmed start-up state, and means for flipping the state of the cell in response to a flip signal....
US-9,406,371 Semiconductor devices and semiconductor systems including the same
A semiconductor device includes an output controller and a data strobe signal generator. The output controller generates a period signal and a control clock...
US-9,406,370 Memory device, and semiconductor device and electronic appliance including the same
A memory device capable of optimizing a refresh cycle is provided. The memory device includes a monitor circuit capable of generating a signal serving as a...
US-9,406,369 Memory module and manufacturing method thereof
A memory module includes a printed circuit board; first memory chips disposed in parallel with a long axis of the printed circuit board along a first column;...
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