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Semiconductor device including gate electrode for applying tensile stress
to silicon substrate, and method of...
A gate insulating film and a gate electrode of non-single crystalline silicon for forming an nMOS transistor are provided on a silicon substrate. Using the gate...
BEOL selectivity stress film
The present disclosure relates to an integrated chip having one or more back-end-of-the-line (BEOL) selectivity stress films that apply a stress that improves...
Reduced resistance short-channel InGaAs planar MOSFET
A metal-oxide-semiconductor field effect transistor (MOSFET) and a method of fabricating a MOSFET are described. The method includes depositing and patterning a...
A method is provided for fabricating a junction-less transistor. The method includes providing a semiconductor substrate having a dielectric layer; and forming...
Enhanced breakdown voltages for high voltage MOSFETS
An integrated circuit (IC) includes a high-voltage (HV) MOSFET on a substrate. The substrate includes a handle substrate region, an insulating region, and a...
Electronic device including a conductive electrode and a process of
forming the same
An electronic device can include a semiconductor layer, an insulating layer overlying the semiconductor layer, and a conductive electrode. In an embodiment, a...
Semiconductor device having structure capable of suppressing oxygen
diffusion and method of manufacturing the same
A semiconductor device is provided. The device includes a substrate; a gate dielectric film formed on the substrate; a gate electrode formed on the gate...
Multi-layer gate dielectric
A transistor gate dielectric including a first dielectric material having a first dielectric constant and a second dielectric material having a second...
Contact geometry having a gate silicon length decoupled from a transistor
Methods for forming a semiconductor device are provided. In one embodiment, a gate structure having a gate insulating layer and a gate electrode structure...
Group III nitride semiconductor device which can be used as a power
A semiconductor device includes a substrate, a first nitride semiconductor layer formed on the substrate, a p-type nitride semiconductor layer formed on the...
Nitride semiconductor device and method for manufacturing same
According to one embodiment, a nitride semiconductor device includes a first semiconductor layer, a second semiconductor layer, a first electrode, a second...
A semiconductor device includes a first and second nitride semiconductor layer. The second nitride semiconductor layer has a band gap larger the first nitride...
IGBT module and a circuit
An IGBT module is provided. The IGBT module has at least a first individual IGBT with a first softness during switching-off the IGBT module, and at least a...
Protective device for a voltage-controlled semiconductor switch
A protective device for a voltage-controlled semiconductor switch has a gate connection, a power emitter connection, an auxiliary emitter connection and a...
Low-temperature fabrication of nanomaterial-derived metal composite thin
Disclosed are new methods of fabricating nanomaterial-derived metal composite thin films via solution processes at low temperatures (<400.degree. C.). The...
Method for fabricating semiconductor device including a patterned
multi-layered dielectric film with an exposed...
A method for fabricating a semiconductor device includes forming a patterned multi-layered dielectric film on a substrate; forming a patterned stack on the...
Method of trimming fin structure
A method of trimming a fin structure includes the following operations: (i) forming a fin structure on a substrate; (ii) epitaxially growing an epitaxy...
Method of fabricating semiconductor device
A method of fabricating a semiconductor device includes forming first and second fin-type structures on first and second regions of a substrate, respectively,...
Methods of forming a complex GAA FET device at advanced technology nodes
The present disclosure provides a method of forming a semiconductor device and a semiconductor device. An SOI substrate portion having a semiconductor layer, a...
Self-aligned passivation of active regions
A method includes forming a semiconductor fin, performing a first passivation step on a top surface of the semiconductor fin using a first passivation species,...
Thin-film transistor, method of manufacturing the same, and organic
light-emitting diode (OLED) display...
A thin-film transistor, method of manufacturing the same, and organic light-emitting diode (OLED) display including the same are disclosed. In one aspect, the...
Dual gate structure
Methods for forming a dual gate structure for a vertical TFT are described. The dual gate structure may be formed by performing a first etching process that...
Trench power MOSFET
A device includes a semiconductor region of a first conductivity type, a trench extending into the semiconductor region, and a conductive field plate in the...
Method for embedded diamond-shaped stress element
A method of manufacturing a semiconductor device with an embedded layer, by anisotropically etching a substrate adjacent to an already formed gate structure. A...
Method for fabricating semiconductor device
A gate pattern is formed on a first region of a substrate. An epitaxial layer is formed on a second region of the substrate. A recess is formed in the second...
Method of fabricating a transistor using contact etch stop layers
A method for fabricating a field-effect transistor includes forming a spacer adjacent to sidewalls of a gate structure. The method further includes forming...
Sacrificial layer for replacement metal semiconductor alloy contact
A sacrificial layer is formed on exposed surfaces of source/drain structures that are located at the footprint of a gate stack. A stack of, from bottom to top,...
Methods of forming replacement gate structures on FinFET devices and the
One illustrative method disclosed herein includes, among other things, forming at least one layer of insulating material with a substantially planar upper...
Ion implantation methods and structures thereof
A method for fabricating a semiconductor device using a high-temperature ion implantation process includes providing a substrate including a plurality of fins....
Methods of manufacturing semiconductor devices
In a method of manufacturing a semiconductor device, the method comprises: forming a dummy gate pattern on a substrate; and forming first spacers at side...
Contacts for transistors
The present disclosure relates to a semiconductor device having a delta doped sheet layer within a transistor's source/drain region to reduce contact...
Rectifier structures with low leakage
An integrated circuit device includes a first III-V compound layer, a second III-V compound layer over the first III-V compound layer, a gate dielectric over...
Method of manufacturing HEMTs with an integrated Schottky diode
A method of manufacturing a transistor device includes forming a compound semiconductor material on a semiconductor carrier, forming a source region and a drain...
Narrow semiconductor trench structure
Systems and methods for narrow semiconductor trench structures. In a first method embodiment, a method for forming a narrow trench comprises forming a first...
Semiconductor device and semiconductor device manufacturing method
In aspects of the invention, an n-type epitaxial layer that forms an n.sup.- type drift layer is formed on the upper surface of an n-type semiconductor...
Manufacturing method for silicon carbide semiconductor device
In a method of manufacturing a silicon carbide semiconductor device having a JFET, after forming a second concave portion configuring a second mesa portion, a...
Semiconductor device and method of manufacturing semiconductor device
A semiconductor device includes a first semiconductor layer made of a nitride semiconductor and formed on a substrate, a second semiconductor layer made of a...
Method for fabricating semiconductor device and semiconductor device
A method for fabricating a semiconductor device includes: forming a metal pattern including nickel on a semiconductor layer, the metal pattern having upper and...
Aligned gate-all-around structure
A semiconductor device includes a gate disposed over a substrate. The gate has a first gate portion of the gate including a gate dielectric and a gate electrode...
Vertical semiconductor device having semiconductor mesas with side walls
and a PN-junction extending between...
A vertical semiconductor device includes a semiconductor body having a backside and extending, in a peripheral area and in a vertical direction substantially...
Method for manufacturing semiconductor device using a semiconductor
substrate including silicon and a first...
A method for manufacturing a semiconductor device includes processes of: (a) implant first conductivity type first impurities in a first region of a first...
A semiconductor device includes a GaN-based semiconductor layer, a source electrode on the GaN-based semiconductor layer, a drain electrode on the GaN-based...
Semiconductor component having a dopant region formed by a dopant composed
of an oxygen/vacancy complex
A semiconductor component includes a semiconductor body having a first side and a second side opposite the first side. In the semiconductor body, a dopant...
Semiconductor device and method of manufacturing the same
A semiconductor device of an embodiment includes, an n-type SiC substrate that has first and second faces, and contains a p-type impurity and an n-type...
Methods of forming stressed channel regions for a FinFET semiconductor
device and the resulting device
One method disclosed includes, among other things, covering the top surface and a portion of the sidewalls of an initial fin structure with etch stop material,...
Stacked thin channels for boost and leakage improvement
A hollow-channel memory device comprises a source layer, a first hollow-channel pillar structure formed on the source layer, and a second hollow-channel pillar...
Semiconductor device with thinned channel region and related methods
A method for making a semiconductor device may include forming a dummy gate above a semiconductor layer on an insulating layer, forming sidewall spacers above...
Semiconductor device and manufacturing method thereof
In a silicon carbide semiconductor device having a trench type MOS gate structure, the present invention makes it possible to inhibit the operating...
System and method of manufacturing a fin field-effect transistor having
multiple fin heights
An apparatus comprises a first fin field effect transistor (FinFET) device extending from a surface of a first etch stop layer. The apparatus also comprises a...
Silicide regions in vertical gate all around (VGAA) devices and methods of
An embodiment semiconductor device includes a nanowire extending upwards from a semiconductor substrate, a source/drain region in the nanowire, and a channel...