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Patent # Description
US-9,419,170 Controlling the stoichiometry and doping of semiconductor materials
Methods for treating a semiconductor material are provided. According to an aspect of the invention, the method includes annealing the semiconductor material in...
US-9,419,169 Method for producing a semiconductor element of a direct-converting x-ray detector
A production method of a semiconductor element of a direct-converting x-ray detector is disclosed, wherein at least one intermediate layer is applied to a...
US-9,419,168 Method of manufacturing a solar cell by texturing a principal surface using an alkaline solution
A method of manufacturing a solar cell including a crystalline semiconductor substrate, includes: etching or washing at least part of a first principal surface...
US-9,419,167 Making semiconductor bodies from molten material using a free-standing interposer sheet
An interposer sheet can be used for making semiconductor bodies, such as of silicon, such as for solar cell use. It is free-standing, very thin, flexible,...
US-9,419,166 Etching processes for solar cell fabrication
A method of fabricating a solar cell can include forming a first dopant region over a silicon substrate and an oxide region over the first dopant region. In an...
US-9,419,165 Laser processing for high-efficiency thin crystalline silicon solar cell fabrication
A method for making a back contact solar cell. Base isolation regions are formed in a crystalline silicon back contact solar cell substrate having a substrate...
US-9,419,164 Solar cell module having interconnector and method of fabricating the same
A solar cell module having an interconnector and a method of fabricating the same are disclosed. The solar cell module includes a plurality of solar cells and...
US-9,419,163 Solar panel and method for manufacturing the same
A solar panel capable of exhibiting excellent aesthetics and power generation efficiency, and capable of easily forming a protection plate in a manufacturing...
US-9,419,162 Array sensor apparatus and forming method thereof
An array sensor apparatus and forming method thereof, wherein the array sensor comprises: a driving circuit and a sensor circuit, wherein the driving circuit...
US-9,419,161 Hybrid multi-spectrum photosensitive pixel group, photosensitive device, and photosensitive system
The present invention relates to a mixed multi-spectrum light-sensing pixel group, a light-sensing device, and a light-sensing system. The mixed multi-spectrum...
US-9,419,160 Nitride semiconductor structure
A nitride semiconductor structure is provided. The nitride semiconductor structure includes a substrate, a SiC nucleation layer, a composite buffer layer and a...
US-9,419,159 Semiconductor light-detecting element
Prepared is an n.sup.- type semiconductor substrate 1 having a first principal surface 1a and a second principal surface 1b opposed to each other, and having a...
US-9,419,158 Solar cell and method for manufacturing same
The invention provides a solar cell and a method for manufacturing same. The solar cell contains a carbon structure layer; a microstructure formed on the carbon...
US-9,419,157 Solid-state imaging device, manufacturing method and designing method thereof, and electronic device
A solid-state imaging device including pixel photododes on a light-receiving surface of a substrate; a first insulating film on the substrate covering a...
US-9,419,156 Package and method for integration of heterogeneous integrated circuits
A package for holding a plurality of heterogeneous integrated circuits includes a first chip having a first conductive pad and a first substrate including a...
US-9,419,155 Sensing product and method of making
This description relates to a sensing product formed using a substrate with a plurality of epi-layers. At least a first epi-layer has a different composition...
US-9,419,154 Interdigitated electrode formation
The disclosed technology generally relates to photovoltaic devices and methods of fabricating photovoltaic devices, and more particularly relates to...
US-9,419,153 Process for manufacturing a solar cell and solar cell
A solar cell segment includes a substrate defining a rear side including a number of base doped regions and emitter doped regions. A dielectric layer and at...
US-9,419,152 Carbon electrode, carbon electrode production method, and photoelectric conversion device
A carbon electrode of an embodiment includes: a graphene having a graphene skeleton, carbon atoms in the graphene skeleton being partially substituted by a...
US-9,419,151 High-reflectivity back contact for photovoltaic devices such as copper--indium-diselenide solar cells
A photovoltaic device (e.g., solar cell) includes: a front substrate (e.g., glass substrate); a semiconductor absorber film; a back contact including a first...
US-9,419,150 Photosensor
For a photosensor, an array substrate is provided, wherein the edge of a photodiode is enclosed by the opening edge of a contact hole formed on a drain electrode.
US-9,419,149 Solar cell sheet and heat treatment process thereof
Provided are a solar cell sheet and a heat treatment process thereof. The heat treatment process includes: a) sifting from solar cell sheets after printed and...
US-9,419,148 Diode with insulated anode regions
A diode is integrated on a semiconductor chip having anode and cathode surfaces opposite to each other. The diode comprises a cathode region extending inwardly...
US-9,419,147 Electronically controlled squishable composite switch
A method and apparatus for making analog and digital electronics which includes a composite including a squishable material doped with conductive particles. A...
US-9,419,146 Semiconductor device and method for manufacturing the same
A region containing a high proportion of crystal components and a region containing a high proportion of amorphous components are formed separately in one oxide...
US-9,419,145 Semiconductor device
To give favorable electrical characteristics to a semiconductor device. The semiconductor device includes an insulating layer, a semiconductor layer over the...
US-9,419,143 Semiconductor device and manufacturing method thereof
A semiconductor device with a structure in which an increase in the number of oxygen vacancies in an oxide semiconductor layer can be suppressed and a method...
US-9,419,142 Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device includes: forming a photocatalytic layer and an organic compound layer in contact with the photocatalytic...
US-9,419,141 Replacement channel
The present disclosure relates to a device and method for strain inducing or high mobility channel replacement in a semiconductor device. The semiconductor...
US-9,419,140 Two-dimensional condensation for uniaxially strained semiconductor fins
Techniques are disclosed for enabling multi-sided condensation of semiconductor fins. The techniques can be employed, for instance, in fabricating fin-based...
US-9,419,139 Nitride layer protection between PFET source/drain regions and dummy gate during source/drain etch
Methods of using a nitride to protect source/drain regions during dummy gate removal and the resulting devices are disclosed. Embodiments include forming an...
US-9,419,138 Embedded carbon-doped germanium as stressor for germanium nFET devices
Carbon-doped germanium stressor regions are formed in an nFET device region of a germanium substrate and at a footprint of a functional gate structure. The...
US-9,419,137 Stress memorization film and oxide isolation in fins
A method of straining fins of a FinFET device by using a stress memorization film and the resulting device are provided. Embodiments include providing a...
US-9,419,136 Dislocation stress memorization technique (DSMT) on epitaxial channel devices
The present disclosure relates to a transistor device having epitaxial source and drain regions with dislocation stress memorization (DSM) regions that provide...
US-9,419,135 Three dimensional NAND device having reduced wafer bowing and method of making thereof
A monolithic three dimensional NAND string includes a plurality of control gate electrodes extending substantially parallel to a major surface of a substrate,...
US-9,419,134 Strain enhancement for FinFETs
An integrated circuit device includes a substrate having a first portion in a first device region and a second portion in a second device region. A first...
US-9,419,133 Semiconductor device and fabrication method of semiconductor device
P.sup.+ type regions and a p-type region are selectively disposed in a surface layer of a silicon carbide substrate base. The P.sup.+ type region is disposed in...
US-9,419,132 Semiconductor device
A semiconductor device can ensure predetermined current capacity under maintaining breakdown voltage characteristics and can promote size reduction. A first...
US-9,419,131 Semiconductor device having vertical channel transistor and method for fabricating the same
A semiconductor device having a substrate; a plurality of pillar structures, wherein each pillar structure includes an active pillar disposed over the...
US-9,419,130 Semiconductor device and integrated circuit
A semiconductor device in a semiconductor substrate includes a first drain region and a second drain region, a first drift zone and a second drift zone, at...
US-9,419,129 Split gate semiconductor device with curved gate oxide profile
A split gate semiconductor device includes a trench gate having a first electrode region and a second electrode region that are separated from each other by a...
US-9,419,128 Bidirectional trench FET with gate-based resurf
A device includes a semiconductor substrate having a surface, a trench in the semiconductor substrate extending vertically from the surface, a body region...
US-9,419,127 Semiconductor device including switching devices in an epitaxial layer
A semiconductor device includes switching devices in an epitaxial layer on a silicon substrate. Diffusion regions of different conductivity types are provided....
US-9,419,126 Integrated circuits and methods for fabricating integrated circuits with active area protection
Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, a semiconductor substrate includes a shallow trench...
US-9,419,125 Doped barrier layers in epitaxial group III nitrides
A semiconductor structure having a Group III-N buffer layer and a Group III-N barrier layer in direct contact to form a junction between the Group III-V buffer...
US-9,419,124 Insulating gate AlGaN/GaN HEMT
AlGaN/GaN HEMTs are disclosed having a thin AlGaN layer to reduce trapping and also having additional layers to reduce gate leakage and increase the maximum...
US-9,419,123 Field effect power electronic device and method for fabricating the same
In a method for fabricating a field effect power electronic device, an epi layer is formed on a substrate defined by a device isolation area and a device...
US-9,419,122 Etch-based fabrication process for stepped field-plate wide-bandgap
A method of making a stepped field gate for an FET including forming a first set of layers having a passivation layer on a barrier layer of the FET and a first...
US-9,419,121 Semiconductor device with multiple carrier channels
A semiconductor device includes a layered structure forming multiple carrier channels extending in parallel at different depths of the semiconductor device and...
US-9,419,120 Multichannel devices with improved performance
A transistor device is provided that comprises a base structure, and a superlattice structure overlying the base structure and comprising a multichannel ridge...
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