At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.
Local thinning of semiconductor fins
After formation of gate structures over semiconductor fins and prior to formation of raised active regions, a directional ion beam is employed to form a...
Methods of manufacturing FINFET semiconductor devices using sacrificial
gate patterns and selective oxidization...
A method of manufacturing a semiconductor device includes patterning a substrate to form an active fin, forming a sacrificial gate pattern crossing over the...
Stress memorization technique for strain coupling enhancement in bulk
A method for forming strained fins includes etching trenches in a bulk substrate to form fins, filling the trenches with a dielectric fill and recessing the...
Graphene nanoribbons and carbon nanotubes fabricated from SiC fins or
Semiconductor structures including parallel graphene nanoribbons or carbon nanotubes oriented along crystallographic directions are provided from a template of...
Method of producing a III-V fin structure
A method of producing a III-V fin structure within a gap separating shallow trench isolation (STI) structures and exposing a semiconductor substrate is...
Patterning of vertical nanowire transistor channel and gate with directed
Directed self-assembly (DSA) material, or di-block co-polymer, to pattern features that ultimately define a channel region a gate electrode of a vertical...
Semiconductor device and method
Vertical gate all around devices are formed by initially forming a first doped region and a second doped region that are planar with each other. A channel layer...
MOS transistor and fabrication method
MOS transistors and fabrication methods are provided. An exemplary MOS transistor includes a gate structure formed on a semiconductor substrate. A lightly doped...
Methods of forming semiconductor devices, including performing a heat
treatment after forming a metal layer and...
Methods of forming semiconductor devices are provided. A method of forming a semiconductor device includes forming an insulating layer that includes a trench...
FinFET device having a high germanium content fin structure and method of
A fin of silicon-germanium material is formed and covered with an epitaxially grown layer of silicon material. A dummy transistor gate is then formed to extend...
Dummy gate structure and methods thereof
A structure and method for implementation of dummy gate structures within multi-gate device structures includes a semiconductor device including an isolation...
Methods of forming nanowire devices with spacers and the resulting devices
A method of forming a nanowire device includes forming semiconductor material layers above a semiconductor substrate, forming a gate structure above the...
Method for producing a semiconductor device comprising a Schottky diode
and a high electron mobility transistor
A semiconductor device includes a Schottky diode and a High Electron Mobility Transistor (HEMT) formed on a III-nitride stack. The III-nitride stack includes at...
Metal-semiconductor wafer bonding for high-Q devices
Methods and apparatus for metal semiconductor wafer bonding for high-Q devices are provided. An exemplary capacitor includes a first plate formed on a glass...
High-K metal gate
An integrated circuit containing metal replacement gates may be formed by forming a nitrogen-rich titanium-based barrier between a high-k gate dielectric layer...
Simplified gate-first HKMG manufacturing flow
When forming field effect transistors according to the gate-first HKMG approach, the cap layer formed on top of the gate electrode had to be removed before the...
Replacement gate structure with low-K sidewall spacer for semiconductor
One method and device disclosed includes, among other things, forming a recessed sacrificial gate electrode having a recessed upper surface, performing at least...
Metal-oxide-semiconductor (MOS) transistor structure integrated with a
resistance random access memory (RRAM)...
The present invention belongs to the technical field of semiconductor memories, in particular to a metal oxide semiconductor (MOS) transistor structure...
Method of making a gate structure
A method of making a gate structure includes forming a gate electrode in an opening defined by a gate dielectric layer having a top surface. Forming the gate...
Semiconductor device and method for manufacturing the same
A semiconductor device is provided that has a plurality of Fin structures extending on a substrate along a first direction; a gate stack structure extending on...
Integrating transistors with different poly-silicon heights on the same
An integrated circuit comprises a first poly-silicon region including a first poly-silicon layer, a second poly-silicon layer disposed over the first...
Display panel and display apparatus having the same
A display panel includes a substrate, an active layer, a gate insulating layer, a gate electrode structure, an insulating interlayer, a switching element, and a...
Method for producing semiconductor device and semiconductor device
A semiconductor device includes a third first-conductivity-type semiconductor layer on a semiconductor substrate; a first pillar-shaped semiconductor layer...
Integrated circuit device having defined gate spacing and method of
designing and fabricating thereof
A device, and method of fabricating and/or designing such a device, including a first gate structure having a width (W) and a length (L) and a second gate...
Method of manufacturing a stress-controlled HEMT
A method of manufacturing a semiconductor device includes providing a heterostructure body with a first doped region, a second doped region spaced apart from...
Semiconductor device including first and second MISFETs
In an n-channel HK/MG transistor including: a gate insulating film made of a first high dielectric film containing La and Hf; and a gate electrode which is...
Transistor devices having an anti-fuse configuration and methods of
forming the same
Transistor devices having an anti-fuse configuration and methods of forming the transistor devices are provided. An exemplary transistor device includes a...
Dual work function buried gate-type transistor, method for forming the
same, and electronic device including...
A transistor includes: a source region and a drain region that are formed in a substrate to be spaced apart from each other; a trench formed in the substrate...
Method of forming SGT MOSFETs with improved termination breakdown voltage
A method of manufacturing a trench power MOSFET device with improved UIS performance and a high avalanche breakdown voltage is disclosed. The method includes...
Low interfacial defect field effect transistor
A disposable gate structure straddling a semiconductor fin is formed. A source region and a drain region are formed employing the disposable gate structure as...
Methods of forming charge-trapping regions
Some embodiments include methods of forming charge-trapping zones. The methods may include forming nanoparticles, transferring the nanoparticles to a liquid to...
Integrated circuit devices including contacts and methods of forming the
Integrated circuit devices including contacts and methods of forming the same are provided. The devices may include a fin on a substrate, a gate structure on...
Semiconductor device and method of manufacturing the same
A semiconductor device including an active cell region formed over the surface of a silicon substrate and including a vertical MOSFET, a drain electrode formed...
Power semiconductor device and method
A power semiconductor device includes a semiconductor body having a first side, a second side opposite the first side and an outer rim. The semiconductor body...
.beta.-Ga2O3-based single crystal substrate
A .beta.-Ga.sub.2O.sub.3-based single crystal substrate includes an average dislocation density of less than 7.31.times.10.sup.4 cm.sup.-2. The average...
Composite substrate of gallium nitride and metal oxide
The present invention discloses a novel composite substrate which solves the problem associated with the quality of substrate surface. The composite substrate...
Graphene layer transfer
A method to transfer a layer of graphene from one substrate to another substrate is provided. The method includes providing a first layered structure including,...
Channel strain and controlling lateral epitaxial growth of the source and
drain in FinFET devices
A multi-gate finFET structure and formation thereof. The multi-gate finFET structure has a first gate structure that includes an inner side and an outer side....
Formation of finFET junction
A method of forming a finFET structure having an ion implanted intermediate region next to the channel region of a finFET gate. The intermediate region is...
Vertical transistor with improved robustness
A transistor is disclosed that includes a semiconductor body having a first horizontal surface. A drift region is arranged in the semiconductor body. A...
Nanowire and method of fabricating the same
A method of forming a nanowire includes providing a substrate. The substrate is etched to form at least one fin. Subsequently, a first epitaxial layer is formed...
The present invention provides some methods for forming at least two different nanowire structures with different diameters on one substrate. Since the diameter...
Superjunction structures for power devices and methods of manufacture
In a general aspect, a power device can include an epitaxial layer of a first conductivity type, an active region, a termination region surrounding the active...
Diluted drift layer with variable stripe widths for power transistors
A multi-finger lateral high voltage transistors (MFLHVT) includes a substrate doped a first dopant type, a well doped a second dopant type, and a buried drift...
High breakdown voltage semiconductor device having a resurf layer
In a semiconductor device according to the present invention, an electrode layer and a recessed part are formed on a surface of a semiconductor substrate....
Semiconductor device and method of fabricating the same
A semiconductor device includes a first multi-channel active pattern defined by a field insulating layer and extending along a first direction, the first...
Method of forming a group III-nitride crystalline film on a patterned
substrate by hydride vapor phase epitaxy...
A method of depositing a high quality low defect single crystalline Group III-Nitride film. A patterned substrate having a plurality of features with inclined...
Semiconductor devices including capacitors and methods of manufacturing
A semiconductor device includes a first capacitor structure, a second capacitor structure, and an insulation pattern. The first capacitor structure includes a...
High density three-dimensional integrated capacitors
A component includes a substrate and a capacitor formed in contact with the substrate. The substrate can consist essentially of a material having a coefficient...
Metal-insulator-metal stack and method for manufacturing the same
A method for manufacturing a metal-insulator-metal (MIM) stack is described. The method includes forming a temporary stack by depositing a bottom electrode...