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Pb-free solder bumps with improved mechanical properties
A method of forming an electronic device, comprising providing a semiconductor substrate having a first contact and an undoped electroplated lead-free solder...
Device and method for bonding substrates
A device for bonding of one bond side of a first substrate to one bond side of a second substrate, the device having one module group with a common working...
Clamping mechanism for processing of a substrate within a substrate
A method and clamping apparatus for securing a substrate within a substrate carrier during an ultrasonic mounting process. The clamping apparatus may include a...
Power semiconductor module
Disclosed herein is a power semiconductor module. The power semiconductor module includes: a printed circuit board (PCB); first and second heat spreaders...
Method of manufacturing semiconductor device and semiconductor device
Characteristics of a semiconductor device are improved. An opening that exposes a pad region of a top-layer wiring containing aluminum is formed in a protection...
A semiconductor device includes a semiconductor element, a substrate, a lead, and a sealing resin member. The semiconductor element has a first electrode and a...
Embedded die redistribution layers for active device
Embedded die packages are described that employ one or more substrate redistribution layers (RDL) to route electrode nodes and/or for current redistribution. In...
Bump structures for multi-chip packaging
A multi-chip package includes a substrate having a plurality of first bump structures. A pitch between first bump structures of the plurality of first bump...
Semiconductor device and method for manufacturing the same
The present disclosure relates to a semiconductor device and a method for manufacturing the same. The semiconductor device includes a semiconductor die, a...
Semiconductor device with post-passivation interconnect structure and
method of forming the same
A semiconductor device, including a protective layer overlying a contact pad and a dummy pad on a semiconductor substrate, an interconnect structure overlying...
A semiconductor device comprises: a pad group including a plurality of pads provided on a semiconductor substrate and arranged in a row to form a pad row as a...
Flip-chip employing integrated cavity filter, and related components,
systems, and methods
A flip-chip employing an integrated cavity filter is disclosed comprising an integrated circuit (IC) chip comprising a semiconductor die and a plurality of...
Portable apparatus, IC packaging structure, IC packaging object, and IC
packaging method thereof
A portable apparatus, an IC packaging structure, an IC packaging object, and an IC packaging method thereof are disclosed. The IC packaging structure includes...
Semiconductor wafer, semiconductor IC chip and manufacturing method of the
A semiconductor wafer includes circuit integration regions each incorporating an integrated circuit and guard rings disposed to surround the circuit integration...
Semiconductor device and method for manufacturing a semiconductor device
A device includes a semiconductor chip. An outline of a frontside of the semiconductor chip includes at least one of a polygonal line including two line...
Chip packages and methods of manufacturing the same
Chip packages and methods of manufacture thereof are disclosed. In some embodiments, a chip package may include: a chip having a contact pad disposed at a first...
Wire and semiconductor device
A wire of an embodiment includes: a substrate; a metal film provided on the substrate; a metal part provided on the metal film; and graphene wires formed on the...
Capping layer interface interruption for stress migration mitigation
A semiconductor device includes a substrate, a dielectric layer supported by the substrate, an interconnect adjacent the dielectric layer, the interconnect...
Devices and methods related to a sputtered titanium tungsten layer formed
over a copper interconnect stack...
Disclosed are devices and methods related to metallization of semiconductors. A metalized structure can include a stack disposed over a compound semiconductor,...
Semiconductor device, fabrication method for a semiconductor device and
Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion...
Method to reduce metal fuse thickness without extra mask
Methods of fabricating a multi-layer semiconductor structure are provided. In one embodiment, a method includes depositing a first dielectric layer over a...
Package substrate and method for manufacturing package substrate
A package substrate includes interlayer insulating layers including outermost and inner-layer layers, conductor layers including an outermost layer, a first...
Interposer with lattice construction and embedded conductive metal
A lattice structure is formed in a non-silicon interposer substrate to create large cells that are multiples of through hole pitches to act as islands for...
Passive component as thermal capacitance and heat sink
Representative implementations of devices and techniques provide improved thermal performance of a chip die disposed within a layered printed circuit board...
Semiconductor device having wire studs as vertical interconnect in FO-WLP
A semiconductor device has a substrate and semiconductor die disposed over a first surface of the substrate. A wire stud is attached to the first surface of the...
Air trench in packages incorporating hybrid bonding
A package component includes a surface dielectric layer including a planar top surface, a metal pad in the surface dielectric layer and including a second...
Power quad flat no-lead (PQFN) package having bootstrap diodes on a common
integrated circuit (IC)
According to an exemplary implementation, a power quad flat no-lead (PQFN) package includes a multi-phase inverter situated on a leadframe. The PQFN package...
In a QFN that includes a die pad, a semiconductor chip mounted on the die pad, a plurality of leads arranged around the semiconductor chip, a plurality of wires...
A first chip including electrodes is mounted above an expanded semiconductor chip formed by providing an expanded portion at an outer edge of a second chip...
Bridging DMB structure for wire bonding in a power semiconductor device
A power module includes a substrate DMB (Direct Metal Bonded). A novel bridging DMB is surface mounted to the substrate DMB along with power semiconductor...
Leadless semiconductor package and method
A method of forming semiconductor devices on a leadframe structure. The leadframe structure comprising an array of leadframe sub-structures each having a...
A semiconductor device includes a semiconductor substrate having a first surface, a through silicon via (TSV) that is formed so that at least a part thereof...
Embedded electronic packaging and associated methods
An electronic package includes a semiconductor die, conductive pillars extending outwardly from the semiconductor die, and a liquid crystal polymer (LCP) body...
Through-hole electrode substrate
A method of manufacturing a through-hole electrode substrate includes forming a plurality of through-holes in a substrate, forming a plurality of through-hole...
Electronic component and method
An electronic component includes a high-voltage depletion-mode transistor, a low-voltage enhancement-mode transistor arranged adjacent and spaced apart from the...
Packaging and cooling method and apparatus for power semiconductor devices
A packaging and cooling apparatus for power semiconductor devices comprising a printed circuit board and a semiconductor module. The semiconductor module having...
The present disclosure relates to a semiconductor package. In an embodiment, the semiconductor package includes a substrate, a semiconductor device, a thermal...
Semiconductor module including plate-shaped insulating members having
A power semiconductor chip and a low-power portion that has power consumption lower than that of the power semiconductor chip are located on a predetermined...
3DIC stacking device and method of manufacture
A system and method for stacking semiconductor devices in three dimensions is provided. In an embodiment two or more semiconductor dies are attached to a...
Method of bond pad protection during wafer processing
A method for protecting terminal elements on a wafer during wafer level fabrication processes entails applying a protective coating to the terminal elements...
In a liquid crystal display device (1) according to one aspect of the present invention, each of a first gate driver (17) supplying a gate signal to a first...
Semiconductor device having recessed edges and method of manufacture
A device and method of manufacture is provided that utilize recessed regions along a package edge. For example, in an integrated fan-out package, the dielectric...
A semiconductor device includes a molded body obtained by sealing, with a sealing material, a member including a semiconductor element, an insulating substrate...
Semiconductor device and manufacturing method thereof
It is possible to provide a semiconductor device which can be obtained at a high reliability by warping an insulating substrate stably into a convex shape while...
Semiconductor element housing package, semiconductor device, and mounting
A semiconductor element housing package includes a rectangular ceramic package having a recess section on an upper surface thereof or a penetration section from...
Method and structure for determining thermal cycle reliability
A test structure used to determine reliability performance includes a patterned metallization structure having multiple interfaces, which provide stress risers....
Lithography process monitoring of local interconnect continuity
Disclosed is a novel system and method to form local interconnects in a continuity test structure. The method begins with a first set of transistor gate lines...
Semiconductor device and method of manufacturing semiconductor device
A donor layer that is formed by performing a heat treatment for a crystal defect formed by proton radiation is provided in an n-type drift layer of an n.sup.-...
IC and IC manufacturing method
Disclosed is a method of manufacturing a vertical bipolar transistor in a CMOS process, comprising implanting an impurity of a first type into a the substrate...
Diffusion-controlled semiconductor contact creation
A contact can be formed by forming a layer of dielectric material on a silicon-containing region of a semiconductor substrate. An opening is created through the...