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Patent # Description
US-9,448,913 Performance metric visualization systems and methods
A method of providing performance metric data includes displaying a set of computer instruction elements using an integrated development environment application...
US-9,448,912 Providing service address space for diagnostics collection
A method and system are provided for providing a service address space for diagnostics collection. The method includes: providing a service co-processor...
US-9,448,911 Providing service address space for diagnostics collection
A method and system are provided for providing a service address space for diagnostics collection. The system includes: a service co-processor attached to a...
US-9,448,910 Computer-implemented method, program, and tracer node for obtaining trace data relating to particular virtual...
An improved method for identifying trace data relating to a particular virtual machine from trace data acquired by a tracer node. The method is executed in a...
US-9,448,909 Randomly branching using performance counters
A system and method for efficiently performing program instrumentation. A processor processes instructions stored in a memory. When the processor processes a...
US-9,448,908 System and method for model based session management
System and method for model based session management. A session including a set of interactions with an application and screens produced by the application may...
US-9,448,907 Computer application maturity illustration system with single point of failure analytics and remediation techniques
An application maturity illustration system is provided. Such a system may determine a maturity of a computer application, and display same. The determination...
US-9,448,906 Service quality evaluator having adaptive evaluation criteria
An improved method is provided for evaluating service quality of a software application residing in a computing environment. The method includes: monitoring...
US-9,448,905 Monitoring and control of storage device based on host-specified quality condition
A method of controlling a storage device comprises monitoring whether a quality of service (QoS) of the storage device satisfies a quality condition set through...
US-9,448,904 Information processing apparatus and server management method
An information processing apparatus includes an instruction unit and a calculation unit, and instructs a plurality of physical servers to start to provide or...
US-9,448,903 Multiple test type analysis for a test case using test case metadata
In one embodiment, a method determines a test case containing test code for testing a functionality of a computer system. The test case is associated with...
US-9,448,902 Validating connection, structural characteristics and positioning of cable connectors
In one or more aspects, a determination is made as to whether a connector is securely fastened, whether the connector connected within a socket structure is the...
US-9,448,901 Remote direct memory access for high availability nodes using a coherent accelerator processor interface
According to one exemplary embodiment, a method for remote direct memory access failover is provided. The method may include determining an RDMA operation will...
US-9,448,900 System and method for datacenters disaster recovery
A method for configuring an asynchronous Disaster Recovery (DR) process over a storage system comprising a plurality of storage sites, the method comprising:...
US-9,448,899 Method, apparatus and system for switching over virtual application two-node cluster in cloud environment
A method for switching over a virtual application two-node cluster in a cloud environment, including: sending an association state of a shared EBS volume to the...
US-9,448,898 Network traffic routing
A service appliance is installed between production servers running service applications and service users. The production servers and their service...
US-9,448,897 Process for selecting an authoritative name server
Methods and systems for intelligently choosing an authoritative name server from among a group of name servers for resolving Domain Name System requests....
US-9,448,896 Torn write mitigation
Torn write mitigation circuitry determines if a write operation to memory is in progress at or about a time of power loss. In response to the write operation...
US-9,448,895 Recording activity of software threads in a concurrent software environment
A technique for failure monitoring and recovery of a first application executing on a first virtual machine includes storing machine state information during...
US-9,448,894 Data protection tiering
A method for data tiering is provided. The method includes sending a plurality of data protection tiering options that are applicable to one or more...
US-9,448,893 Asynchronous replication correctness validation
A method for backing up a client data set on a computer by generating a manifest of the client data set and storing the manifest on a remote server along with a...
US-9,448,892 Systems and methods for migrating components in a hierarchical storage network
System and methods for selectively or automatically migrating resources between storage operation cells are provided. In accordance with one aspect of the...
US-9,448,891 Performing a data write on a storage device
A method of performing a data write on a storage device comprises instructing a device driver for the device to perform a write to the storage device,...
US-9,448,890 Aggregation of write traffic to a data store
A method and a processing device are provided for sequentially aggregating data to a write log included in a volume of a random-access medium. When data of a...
US-9,448,889 BIOS failover update with service processor
Certain aspects direct to basic input/output system (BIOS) failover update with a service processor (SP). In certain embodiments, the system includes a host...
US-9,448,888 Preventing a rollback attack in a computing system that includes a primary memory bank and a backup memory bank
Preventing a rollback attack in a computing system that includes a primary memory bank and a backup memory bank, including during startup of the computing...
US-9,448,887 Distributed erasure coded virtual file system
A plurality of computing devices are communicatively coupled to each other via a network, and each of the plurality of computing devices comprises one or more...
US-9,448,886 Flexible data storage system
Methods and systems for managing and locating available storage space in a system comprising data files stored in a plurality of storage devices and configured...
US-9,448,885 Forward error correction with configurable latency
A method of performing forward error correction with configurable latency, where a configurable latency algorithm evaluates a target Bit Error Rate (BER)...
US-9,448,884 Apparatuses and methods for encoding using error protection codes
Subject matter disclosed herein relates to error protection of data stored in and/or read from a memory device. Coefficient data representing canonical...
US-9,448,883 System and method for allocating data in memory array having regions of varying storage reliability
A system and method are provided for efficient allocation of data in a memory array having regions of varying storage reliability. Storage locations for bands...
US-9,448,882 Systems and methods for enhanced data recovery in a solid state memory system
Systems and method relating generally to data processing, and more particularly to systems and methods for accessing a data set from a solid state storage...
US-9,448,881 Memory controller and integrated circuit device for correcting errors in data read from memory cells
An integrated circuit device for correcting errors in data read from memory cells includes a decoder, an encoder and a data management module. The data...
US-9,448,880 Storage device with robust error correction scheme
A method of enhancing error correction in a data storage system, including receiving a data storage system having one or more rows each row having: a set of...
US-9,448,879 Apparatus and method for implement a multi-level memory hierarchy
An apparatus and method are described for detecting and correcting instruction fetch errors within a processor core. For example, in one embodiment, an...
US-9,448,878 Clock domain crossing serial interface
A method for serial interface clock domain crossing includes identifying a data communication command received over a serial interface. An address is decoded to...
US-9,448,877 Methods and apparatus for error detection and correction in data storage systems using hash value comparisons
Data processing methods and apparatus for processing stored data with error correcting bits to detect and in some instances correct errors. The data processing...
US-9,448,876 Fault detection and prediction in storage devices
A method of fault detection includes, while in normal operation: recording data corresponding to measurements of electrical current drawn during performance of...
US-9,448,875 Error recovery within integrated circuit
An integrated circuit includes one or more portions having error detection and error correction circuits and which is operated with operating parameters giving...
US-9,448,874 Apparatus and method for preventing error in physically unclonable function
An apparatus and method that prevent a bit error in a static random access memory (SRAM)-based Physically Unclonable function (PUF). The method for preventing...
US-9,448,873 Data processing analysis using dependency metadata associated with error information
A method, apparatus, and/or computer program product analyzes data processing. Dependency metadata, which is used for representing dependency on data among at...
US-9,448,872 Hardware state data logger for silicon debug
Systems and methods of utilizing a hardware state data logger to debug in silicon. One or more hardware state data loggers are incorporated into a circuit...
US-9,448,871 Information processing device and method for selecting processor for memory dump processing
An information processing device includes a memory, and a plurality of processors coupled to the memory and including cache memories, and configured to select a...
US-9,448,870 Providing error handling support to legacy devices
In one embodiment, the present invention includes a method for handling a request received in an agent designed in accordance with a peripheral component...
US-9,448,869 Error detection for files
Aspects of the subject matter described herein relate to error detection for files. In aspects, before allowing updates to a clean file, a flag marking the file...
US-9,448,868 Data storing method, memory control circuit unit and memory storage apparatus
A data storing method, a memory control circuit unit, and a memory storage apparatus are provided. The method includes recording a bit error count of every...
US-9,448,867 Processor that detects when system management mode attempts to reach program code outside of protected space
A method is described that includes detecting that a memory access of system management mode program code is attempting to reach program code outside of a...
US-9,448,866 Monitoring device of integrated circuit
A semiconductor memory device includes a plurality of data input/output pads configured to transmit and receive data to and from memory cells, an alert pad...
US-9,448,864 Method and apparatus for processing message between processors
A message processing apparatus that processes a message between processors according to an embodiment of the present invention solves a problem that occurs when...
US-9,448,863 Message passing interface tuning using collective operation modeling
Illustrative embodiments of methods, machine-readable media, and parallel computing systems that automatically tune a communication protocol are disclosed. In...
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