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Patent # Description
US-9,448,812 Algorithm for updating XML schema registry using schema pass by value with message
Schema information is provided with transmission of a data object. When a data object is converted to a transmission format, schema information for the object...
US-9,448,811 Microprocessor device, and method of managing reset events therefor
A microprocessor device comprises at least one reset management module. The at least one reset management module is arranged to detect a reset event comprising...
US-9,448,810 Web-based interface to access a function of a basic input/output system
A web-based interface in an electronic device receives a request to access a function of a Basic Input/Output System.
US-9,448,809 Peripheral device mapping
Systems and methods related to providing peripheral device functionality is described herein. In one embodiment, a method of operating a host computing device...
US-9,448,808 BIOS update with service processor without serial peripheral interface (SPI) access
Certain aspects direct to BIOS update with a service processor (SP) without access through a serial peripheral interface (SPI). In certain embodiments, the...
US-9,448,807 Automatic creation, deployment, and upgrade of disk images
A computer installs an operating system. The computer receives, in a logical partition (LPAR) via a management network, a deploy program configured to download...
US-9,448,806 Circuit and method for identifying exception cases in a floating-point unit and graphics processing unit...
A floating-point unit and a method of identifying exception cases in a floating-point unit. In one embodiment, the floating-point unit includes: (1) a...
US-9,448,805 Software controlled data prefetch buffering
The invention relates to the method of prefetching data in micro-processor buffer under software controls.
US-9,448,804 Techniques for managing graphics processing resources in a tile-based architecture
One embodiment of the present invention sets forth a technique for managing buffer entries in a tile-based architecture. The technique includes receiving a...
US-9,448,803 System and method for hardware scheduling of conditional barriers and impatient barriers
A method and a system are provided for hardware scheduling of barrier instructions. Execution of a plurality of threads to process instructions of a program...
US-9,448,802 Instruction and logic for processing text strings
Method, apparatus, and machine-readable medium for performing a string comparison operation. An apparatus includes execution resources to execute a first...
US-9,448,801 Automatic register port selection in extensible processor architecture
This document discusses, among other things, systems and methods to access n consecutive entries of a register file in a single operation using a register file...
US-9,448,800 Reorder-buffer-based static checkpointing for rename table rebuilding
Out-of-order CPUs, devices and methods diminish the time penalty from stalling the pipe to rebuild a rename table, such as due to a misprediction. A...
US-9,448,799 Reorder-buffer-based dynamic checkpointing for rename table rebuilding
Out-of-order CPUs, devices and methods diminish the time penalty from stalling the pipe to rebuild a rename table, such as due to a misprediction. A...
US-9,448,798 Silent store detection and recording in memory storage
An aspect includes receiving a write request that includes a memory address and write data. Stored data is read from a memory location at the memory address....
US-9,448,797 Restricted instructions in transactional execution
Restricted instructions are prohibited from execution within a transaction. There are classes of instructions that are restricted regardless of type of...
US-9,448,796 Restricted instructions in transactional execution
Restricted instructions are prohibited from execution within a transaction. There are classes of instructions that are restricted regardless of type of...
US-9,448,795 Limited range vector memory access instructions, processors, methods, and systems
A processor of an aspect includes a plurality of packed data registers. The processor also includes a unit coupled with the packed data registers. The unit is...
US-9,448,794 Instruction and logic to provide vector horizontal majority voting functionality
Instructions and logic provide vector horizontal majority voting functionality. Some embodiments, responsive to an instruction specifying: a destination...
US-9,448,793 Automated decomposition for mixed integer linear programs with embedded networks requiring minimal syntax
Embodiments include techniques to receive computer-executable query instructions to solve a MILP problem, the query instructions including a first expression...
US-9,448,792 Automatic risk analysis of software
Techniques are described herein that are capable of performing automatic risk analysis of software. An automatic risk analyzer may determine correlations...
US-9,448,791 Synchronizing source code objects and software development workflow objects
Technologies are described herein for synchronization of source code objects and software development workflow objects. Software development workflow objects...
US-9,448,790 Rapid updating of cloud applications
A method for facilitating the uploading of web applications to a cloud computing environment utilizes hashes or fingerprints of each file in a web application....
US-9,448,789 Method of consolidating, synchronizing, and streaming production content for distributed editing of media...
A synchronized media project, synchronization SDK, and synchronization service enable multiple users to produce a media composition collaboratively. A media...
US-9,448,788 Binary rewriting system
A hybrid static/dynamic binary rewrite method is presented, comprising: a one-time configuration step for instrumentation of an unmodified executable binary,...
US-9,448,787 Methods and systems for analyzing software development risks
Methods and systems for analyzing software development risks are described. In one embodiment, a plurality of risk factor questions associated with a software...
US-9,448,786 Method for updating operating system without memory reset
The invention relates to a computer-implemented method for updating an operating system (OS) without a memory reset. The method includes launching a Virtual...
US-9,448,785 System and method updating full disk encryption software
Disclosed are systems and method or updating full disk encryption (FDE) software on a computer. An example method comprises: blocking operations of the FDE...
US-9,448,784 Reducing downtime during upgrades of interrelated components in a database system
A method, system, and computer program product for reducing downtime during upgrades of interrelated components in a computing environment. The method commences...
US-9,448,783 Software delivery for virtual machines
One embodiment entails delivering a software payload to guest software in a virtual machine so that the software payload is part of a file system accessible by...
US-9,448,782 Reducing a size of an application package
Some examples include techniques for efficiently handling an application package. For instance, a native code library used by an application may be identified....
US-9,448,781 Application installer transmission system, server, and program
A system includes a designation information transmitter and an application installer transmitter. The designation information transmitter is configured to...
US-9,448,780 Package manager verifier
An RPM verifier is described. A master configuration file and a list of host servers are retrieved. The master configuration file defines rules for approved...
US-9,448,779 Execution of retargetted graphics processor accelerated code by a general purpose processor
One embodiment of the present invention sets forth a technique for translating application programs written using a parallel programming model for execution on...
US-9,448,778 Optimizing compiler performance by object collocation
A computer-implemented method, system, and computer program product for performing object collocation on a computer system are provided. The method includes...
US-9,448,777 Apparatus and method for generating assertion based on user program code, and apparatus and method for...
Exemplary embodiments disclose a method for generating an assertion based on a user program code. The method may include receiving a user program comprising at...
US-9,448,776 Method and apparatus for converting a website into a native mobile application
Disclosed herein are a number of embodiments for effective and user-friendly tools that are designed to automatically convert a website into a native app for...
US-9,448,774 Data processing apparatus and method
A data processing and displaying apparatus and method are provided. The apparatus and method may visualize and display interactive contents to be easily...
US-9,448,773 Systems and methods for implementing a uniform application user interface across a multi-tenant environment
In accordance with disclosed embodiments, there are provided systems and methods for implementing a uniform application user interface across a hosted computing...
US-9,448,772 Generating program fragments using keywords and context information
A program development framework (PDF) is described herein which allows a user to produce a program in piecemeal fashion by successively specifying program...
US-9,448,771 System, computer program product, and method for generating a lightweight source code for implementing an image...
A system, method, and computer program product for generating a lightweight source code for implementing an image processing pipeline is disclosed. The method...
US-9,448,770 Source code editor
Disclosed herein are technologies for facilitating source code editing. In accordance with one aspect, a request for an editing feature is received in response...
US-9,448,769 Employing code overlays to facilitate software development
In one embodiment, a method for editing and testing computer programming code is provided. The method includes receiving a first file comprising computer...
US-9,448,768 Modular multiplier and modular multiplication method thereof
A modular multiplier and a modular multiplication method are provided. The modular multiplier includes: a first register which stores a previous accumulation...
US-9,448,767 Three-term predictive adder and/or subtracter
A predictive adder produces the result of incrementing and/or decrementing a sum of A and B by a one-bit constant of the form of the form 2.sup.k, where k is a...
US-9,448,766 Interconnected arithmetic logic units
An arithmetic logic stage in a graphics pipeline includes a number of arithmetic logic units (ALUs). The ALUs each include, for example, a multiplier and an...
US-9,448,765 Floating point scaling processors, methods, systems, and instructions
A method of an aspect includes receiving a floating point scaling instruction. The floating point scaling instruction indicates a first source including one or...
US-9,448,764 Web integrated interactive voice response
A communication service is provided by audibly interacting with a user in a communication in accordance with an audible menu used for audible interaction. A...
US-9,448,763 Accessibility management system for media content items
A system operates to manage accessibility of media content items based on a user's performance of a repetitive motion activity. The system can generate rule...
US-9,448,762 Precognitive interactive music system
The subject disclosure is directed towards a pre-cognitive interactive music system that dynamically generates and adjusts music based on a user's interactions...
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