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Patent # Description
US-9,455,378 High efficiency light emitting diode and method for fabricating the same
A high-efficiency light emitting diode including: a semiconductor stack positioned on a support substrate, including a p-type compound semiconductor layer, an...
US-9,455,377 Light emitting device
A light emitting device includes a metal layer, a light emitting structure, an electrode disposed on a first upper portion of a second conductive type...
US-9,455,376 Substrate for nitride semiconductor device and production method thereof, and red light emitting semiconductor...
A production method of a substrate for nitride semiconductor device comprising a mask formation step of using a metal nitride as a base material and forming a...
US-9,455,375 Light emitting device package including a substrate having at least two recessed surfaces
A light emitting device package includes a substrate having a first cavity and a second cavity directly under the first cavity, a light emitting part on the...
US-9,455,374 Integrated multi-color light emitting device made with hybrid crystal structure
An integrated hybrid crystal Light Emitting Diode ("LED") display device that may emit red, green, and blue colors on a single wafer. The various embodiments...
US-9,455,373 Light emitting element, method of manufacturing the same, and light emitting device
A light emitting element includes: a laminated body including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor...
US-9,455,372 Method and apparatus for optical modulation
The present invention is a method and an apparatus for optical modulation, for example for use in optical communications links. In one embodiment, an apparatus...
US-9,455,371 Light emitting device
Disclosed is a light emitting device including a substrate, a first conductive semiconductor layer disposed on the substrate, an active layer disposed on the...
US-9,455,370 Method for coating a solar panel
The present invention relates to a method for coating a solar panel to reduce the amount of light being received by the solar panel's photovoltaic cells and...
US-9,455,369 Infra red detectors and methods of manufacturing infra red detectors using MOVPE
A method of forming infra red detector arrays is described, starting with the manufacture of a wafer. The wafer is formed from a GaAs or GaAs/Si substrate...
US-9,455,368 Method of forming an interdigitated back contact solar cell
A method of forming an interdigitated back contact solar cell is described. The method uses a deposition process to create a doped glass layer on the substrate,...
US-9,455,367 Disassembling photovoltaic module
Provided is a method of disassembling a photovoltaic module. The method includes: applying heat to the photovoltaic module in an oxidizing atmosphere; removing...
US-9,455,366 Sol-gel process for the manufacture of high power switches
According to one embodiment, a photoconductive semiconductor switch includes a structure of nanopowder of a high band gap material, where the nanopowder is...
US-9,455,365 Optoelectronic switch having a photovoltaic response and associated method of use
A light-induced diode-like response in multi-layered MoSe.sub.2 field-effect transistors resulting from a difference in the size of the Schottky barriers...
US-9,455,364 Tunnel homojunctions in group IV / group II-VI multijunction solar cells
A photovoltaic cell comprises a first subcell formed of a Group IV semiconductor material, a second subcell formed of a Group II-VI semiconductor material, and...
US-9,455,363 PN structure formed by improved doping methods to simplify manufacturing process of diodes for solar cells
A method for doping a semiconductor substrate is disclosed wherein a layer of a first conductivity type is first formed followed by forming a blocking layer...
US-9,455,362 Laser irradiation aluminum doping for monocrystalline silicon substrates
Methods for laser irradiation aluminum doping for monocrystalline silicon substrates are provided. According to one aspect of the disclosed subject matter,...
US-9,455,361 Segmented thin film solar cells
Use of chemical mechanical polishing (CMP) and/or pure mechanical polishing to separate sub-cells in a thin film solar cell. In one embodiment the CMP is only...
US-9,455,360 Method of fabricating a metal wrap through solar cell
Methods of fabricating metal wrap through solar cells and modules for thin silicon solar cells, including epitaxial silicon solar cells, are described. These...
US-9,455,359 Solar battery cell, solar battery module and method of making solar battery module
A solar battery cell and related methodology are provided which enable a TAB wire to be accurately connected to an intended position, thus allowing a possible...
US-9,455,358 Image pickup module and image pickup unit
An image pickup module includes: a wiring board including a first main surface on which chip electrodes are disposed and a second main surface on which the...
US-9,455,357 Compound varactor
Embodiments include apparatuses and methods related to a compound varactor. A first varactor in the compound varactor may include a collector layer and a first...
US-9,455,356 High power silicon carbide (SiC) PiN diodes having low forward voltage drops
Silicon Carbide (SiC) PiN Diodes are provided having a reverse blocking voltage (V.sub.R) from about 3.0 kV to about 10.0 kV and a forward voltage (V.sub.F) of...
US-9,455,355 Semiconductor device
An n.sup.--type semiconductor substrate (1) includes an active region and a terminal region disposed outside the active region. A p.sup.+-type anode layer (2)...
US-9,455,354 Micromachined 3-axis accelerometer with a single proof-mass
This document discusses, among other things, an inertial measurement system including a device layer including a single proof-mass 3-axis accelerometer, a cap...
US-9,455,353 Substrate with multiple encapsulated devices
A device with multiple encapsulated functional layers, includes a substrate, a first functional layer positioned above a top surface of the substrate, the...
US-9,455,352 HTO offset for long leffective, better device performance
Memory devices having an increased effective channel length and/or improved TPD characteristics, and methods of making the memory devices are provided. The...
US-9,455,351 Oxide semiconductor field effect transistor device and method for manufacturing the same
An oxide semiconductor field effect transistor (OS FET) device includes a first dielectric layer formed on a substrate, an oxide semiconductor (OS) island...
US-9,455,350 Transistor device structure that includes polycrystalline semiconductor thin film that has large grain size
A transistor device structure includes a substrate, a first polycrystalline semiconductor thin film and a first transistor unit. The first polycrystalline...
US-9,455,349 Oxide semiconductor thin film transistor with reduced impurity diffusion
A transistor having high field-effect mobility is provided. A transistor having stable electrical characteristics is provided. A transistor having small current...
US-9,455,348 FinFET for device characterization
A method and system is disclosed for providing access to the body of a FinFET device. In one embodiment, a FinFET device for characterization comprises an...
US-9,455,347 Mandrel removal last in lateral semiconductor growth and structure for same
A method of forming a semiconductor structure is disclosed comprising removing mandrel elements, the side walls of which support semiconductor fin structures,...
US-9,455,346 Channel strain inducing architecture and doping technique at replacement poly gate (RPG) stage
The demand for increased performance and shrinking geometry from ICs has brought the introduction of multi-gate devices including finFET devices. Inducing a...
US-9,455,345 Method and apparatus for power device with depletion structure
A semiconductor device is provided. The semiconductor device includes a substrate of a first conductivity type and an epitaxial structure of the first...
US-9,455,344 Integrated circuit metal gate structure having tapered profile
A device having a gate where the profile of the gate provides a first width at a top region and a second width at a bottom region is described. The gate may...
US-9,455,343 Hybrid phase field effect transistor
An insulating layer is deposited over a transistor structure. The transistor structure comprises a gate electrode over a device layer on a substrate. The...
US-9,455,342 Electric field management for a group III-nitride semiconductor device
A semiconductor device includes a substrate, a first active layer, a second active layer, at least first and second electrodes, an E-field management layer, and...
US-9,455,341 Transistor having a back-barrier layer and method of making the same
A transistor includes a substrate and a buffer layer on the substrate, wherein the buffer layer comprises p-type dopants. The transistor further includes a...
US-9,455,340 Power semiconductor device and corresponding module
Power semiconductor device having a wafer, including emitter and collector electrodes arranged on opposite sides, wherein a gate electrode arranged on the...
US-9,455,339 High voltage device and method for manufacturing the same
A high voltage (HV) device and method for manufacturing the same are provided, at least comprising a substrate, an insulation formed on the substrate, a deep...
US-9,455,338 Methods for fabricating PNP bipolar junction transistors
Integrated circuits with bipolar transistors are provided. In one embodiment, a bipolar transistor may include an emitter region, a first base region that...
US-9,455,337 Method for manufacturing semiconductor device
To provide a semiconductor device which occupies a small area and is highly integrated. A first conductive layer is formed; a first insulating layer is formed...
US-9,455,336 SiGe and Si FinFET structures and methods for making the same
FinFET structures and methods for making the same. A method includes: creating a plurality of Silicon fins on a first region of a substrate, creating a...
US-9,455,335 Techniques for ion implantation of non-planar field effect transistors
A method of forming a fin field effect transistor (finFET) device includes forming a fin structure on a substrate, the substrate comprising a semiconductor...
US-9,455,334 Method of forming a Fin structure of semiconductor device
A method of forming a fin structure of a semiconductor device, such as a fin field effect transistor FinFET is provided. In an embodiment, trenches are formed...
US-9,455,333 Thin film transistor array panel
A thin film transistor array panel includes a substrate, a light blocking film disposed on the substrate, a buffer layer covering the light blocking film, and a...
US-9,455,332 LDMOS transistor and method of forming the LDMOS transistor with improved Rds*Cgd
The Rds*Cgd figure of merit (FOM) of a laterally diffused metal oxide semiconductor (LDMOS) transistor is improved by forming the drain drift region with a...
US-9,455,331 Method and structure of forming controllable unmerged epitaxial material
A method of forming a semiconductor device that includes forming a plurality of semiconductor pillars. A dielectric spacer is formed between at least one set of...
US-9,455,330 Recessing RMG metal gate stack for forming self-aligned contact
Embodiments of the present invention may include methods of incorporating an embedded etch barrier layer into the replacement metal gate layer of field effect...
US-9,455,329 Junctionless semiconductor device having buried gate, apparatus including the same, and method for...
A junctionless semiconductor device having a buried gate, a module and system each having the same, and a method for forming the semiconductor device are...
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