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An object is to provide a semiconductor device having a novel structure with a high degree of integration. A semiconductor device includes a semiconductor layer...
Thin film transistor and method of manufacturing the same, array substrate
and display device
A thin film transistor and a method of manufacturing the same, an array substrate and a display device are provided, the thin film transistor including: a...
Standard cell library with DFM-optimized M0 cuts and V0 adjacencies
A library of a DFM-improved standard logic cells that avoid pattern-degrading configurations in the M0 and/or V0 layer(s) is disclosed, along with wafers, chips...
Multi-layer memory array and manufacturing method of the same
A memory array includes a plurality of ridge-shaped multi-layer stacks extending along a first direction, and a hard mask layer formed on top of the plurality...
Method for forming a semiconductor structure
A method for forming a semiconductor structure is provided. The method includes following steps. First, a stack of alternate conductive layers and insulating...
Semiconductor device and manufacturing method thereof
A semiconductor device including a substrate, a bottom insulating layer disposed on the substrate, two stacked structure disposed on the bottom insulating...
Vertical memory devices and methods of manufacturing the same
A method of manufacturing a vertical memory device includes forming alternating and repeating insulating interlayers and sacrificial layers on a substrate, the...
Feed-forward bidirectional implanted split-gate flash memory cell
A split-gate flash memory cell (cell) includes a semiconductor surface. A first control gate (CG) on a first floating gate (FG) and a second CG on a second...
Patterning for variable depth structures
A method of forming a NAND flash memory includes forming a dielectric layer over NAND strings separated by shallow trench isolation structures, forming an...
Methods of fabricating semiconductor devices including multiple patterning
Methods of fabricating semiconductor devices may include forming a stopper layer, a lower hard mask layer, an intermediate hard mask layer, and an upper hard...
Semiconductor device and manufacturing method of the same
A semiconductor device may include semiconductor patterns. The semiconductor device may include insulating layers including first regions surrounding the...
Non-volatile memory and semiconductor device
There is provided a non-volatile memory including: plural zener zap devices, each including a cathode region and an anode region formed in a well; and a metal...
Advanced metal-nitride-oxide-silicon multiple-time programmable memory
An advanced metal-nitride-oxide-silicon (MNOS) multiple time programmable (MTP) memory is provided. In an example, an apparatus includes a two field effect...
Semiconductor devices having vertical device and non-vertical device and
methods of forming the same
A semiconductor device comprises a substrate extending in a horizontal direction and a vertical transistor on the substrate. The vertical transistor comprises:...
Disclosed embodiments relate to a semiconductor device having a plurality of unit transistors that include element isolation regions formed on a semiconductor...
Embedded dynamic random access memory field effect transistor device
A method comprises forming a cavity in a substrate, depositing a silicon material in the cavity, forming a fin in the substrate and the silicon material such...
Methods of forming electronic devices having pads using first and second
An electronic device may include a substrate, and a plurality of spaced apart pads on the substrate. Each of the pads may includes first, second, third, and...
Self-aligned laterally extended strap for a dynamic random access memory
A self-aligned strap structure can be formed by forming trench capacitors and overlying trench top conductive material portions. End portions of fin mask...
Provided is a semiconductor device including first and second semiconductor pillars formed on a surface of a semiconductor substrate and aligning in a first...
Meander line resistor structure
A system comprises a first transistor comprising a first drain/source region and a second drain/source region, a second transistor comprising a third...
Provided is a semiconductor device with a novel structure in which stored data can be retained even when power is not supplied, and which does not have a...
LDMOS device with graded body doping
A laterally diffused MOS (LDMOS) device includes a substrate having a p-epi layer thereon. A p-body region is in the p-epi layer. An ndrift (NDRIFT) region is...
Some embodiments include a semiconductor device having two gate electrodes which are of about a same gate width as one another, and having a first diffusion...
Fin field effect transistor, semiconductor device and fabricating method
A substrate is patterned to form trenches and a semiconductor fin between the trenches. Insulators are formed in the trenches and a dielectric layer is formed...
Semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate, a first gate, a second gate, and an insulating structure. The substrate includes a first fin and a second fin. The...
Sublithographic width finFET employing solid phase epitaxy
A dielectric mandrel structure is formed on a single crystalline semiconductor layer. An amorphous semiconductor material layer is deposited on the physically...
Metal gate finFET device
A device including a substrate having a fin. A metal gate structure is formed on the fin. The metal gate structure includes a stress metal layer formed on the...
System and method of varying gate lengths of multiple cores
A method includes forming a first gate of a first transistor, the first gate having a first length. The first transistor is located in a first core. The method...
Die including a Schottky diode
According to an embodiment of the invention there may be provided a die that may include (a) a first region of a first type; (b) a first conductor that contacts...
Semiconductor device with resistance circuit
A semiconductor device includes an insulated gate field effect transistor and a resistance circuit having a resistance element. The resistance element has a...
Reduced generation of second harmonics of FETs
A structure and method for reducing second-order harmonic distortion in FET devices used in applications that are sensitive to such distortion, such as...
A semiconductor device which uses a fin-type semiconductor layer to form a bipolar transistor. The substrate of the device is a semiconductor substrate. A...
High performance isolated vertical bipolar junction transistor and method
for forming in a CMOS integrated circuit
A CMOS integrated circuit containing an isolated n-channel DEMOS transistor and an isolated vertical PNP transistor has deep n-type wells and surrounding...
Composite group III-V and group IV transistor having a switched substrate
There are disclosed herein various implementations of a group III-V composite transistor having a switched substrate. Such a group III-V composite transistor...
Electro-optical device, electronic apparatus and semiconductor device
In an element substrate of an electro-optical device, MOS transistors (electrostatic protection element) are provided on an opposite side to a light...
Bipolar ESD protection device with integrated negative strike diode
A bipolar ESD protection device includes a substrate having a p-type epi layer thereon including an epi region over an n-buried layer (NBL). An n-type isolation...
Latch-up free vertical TVS diode array structure using trench isolation
A method for manufacturing a transient voltage suppressing (TVS) array substantially following a manufacturing process for manufacturing a vertical...
Semiconductor device and method for producing the same
A capacitive component region is formed below a temperature detecting diode or below a protective diode. In addition, the capacitive component region is formed...
Semiconductor packages and methods for fabricating the same
A semiconductor package may include a first semiconductor chip including a first surface facing a package substrate, a second surface opposite to the first...
An LED circuit (40) comprises integrated circuit LEDs (50) each mounted over a respective LED control circuit (42). The LED control circuits (42) are...
LED package and manufacturing method
An LED package (40) and manufacturing method in which the package has LED substrate (50) and a circuit substrate (54) bonded together, with the LED over the...
Method and system for template assisted wafer bonding
A method of fabricating a composite semiconductor structure includes providing a substrate including a plurality of devices and providing a compound...
Electric magnetic shielding structure in packages
A package includes a device die, a molding material molding the device die therein, and a through-via penetrating through the molding material. A redistribution...
Light emitter devices and methods for light emitting diode (LED) chips
Light emitter devices and methods are provided herein. In some aspects, emitter devices and methods provided herein are for light emitting diode (LED) chips,...
Jetting a highly reflective layer onto an LED assembly
A layer of Highly Reflective (HR) material is deposited by jetting microdots of the HR material in liquid form onto a substrate and then allowing the HR...
Power semiconductor package with a common conductive clip
According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input,...
Electronic circuit comprising PN junction and schottky barrier diodes
A semiconductor device includes a first chip including a PN junction diode, and a second chip including a Schottky barrier diode, connected in parallel to the...
Semiconductor package including an embedded surface mount device and
method of forming the same
Embodiments of the present disclosure include semiconductor packages and methods of forming the same. An embodiment is a semiconductor package including a first...
Semiconductor device and method for making the device
Disclosed herein is a semiconductor device including: a first substrate provided with a first surface layer including a first electrode; an expanded second...
Fan-out PoP structure with inconsecutive polymer layer
A package includes a device die, a molding material molding at least a portion of the device die therein, and a through-via substantially penetrating through...