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Patent # Description
US-9,459,910 Controlling a layered driver
A method, for controlling a layered device driver is discussed. The device driver includes three components divided between user space and kernel space. A...
US-9,459,909 Performing collective operations in a distributed processing system
Methods, apparatuses, and computer program products for performing collective operations on a hybrid distributed processing system including: determining by at...
US-9,459,908 Implementing dynamic SRIOV virtual function resizing
A method, system and computer program product are provided for implementing dynamic configuration of a Single Root Input/Output Virtualization (SRIOV) virtual...
US-9,459,907 Guest controlled malicious payload protection
A system, methods, and apparatus for guest controlled malicious payload protection. A request is received from a virtual machine to enable privileged access to...
US-9,459,906 Method for deploying virtual machines, device thereof and management node
A method for deploying virtual machines is provided according to the disclosure, similarity between a first VM and a second VM is determined according to...
US-9,459,905 Implementing dynamic SRIOV virtual function resizing
A method, system and computer program product are provided for implementing dynamic configuration of a Single Root Input/Output Virtualization (SRIOV) virtual...
US-9,459,904 NUMA I/O aware network queue assignments
Systems and methods for preferentially assigning virtual machines (VMs) on a particular NUMA node with network queues on the same NUMA node are described. A...
US-9,459,903 Techniques for routing service chain flow packets between virtual machines
Examples may include a host computing platform having a multi-core processor capable of supporting a host operating system and a plurality of virtual machines...
US-9,459,902 Memory duplication by destination host in virtual machine live migration
Systems and methods for memory de-duplication in a virtual machine undergoing live migration. An example method may comprise: receiving, by a hypervisor...
US-9,459,901 System and method for the programmatic runtime de-obfuscation of obfuscated software utilizing virtual machine...
A system and method operable to programmatically perform runtime de-obfuscation of obfuscated software via virtual machine introspection and manipulation of...
US-9,459,900 Hypervisor-based balloon page initialization
Methods, systems, and computer program products for hypervisor-based balloon page initialization are provided. A computer-implemented method may include...
US-9,459,899 Apparatus and method for providing services using a virtual operating system
Provided are an apparatus and method for providing services using a virtual operating system (OS). The apparatus classifies virtual resources into a plurality...
US-9,459,898 Virtual server processing control method, system, and virtual server processing control management server
Each of hypervisors operates on one of physical servers, and a virtual server operates in accordance with a file image on one of data stores. A management...
US-9,459,897 System and method for providing data analysis service in cloud environment
The present invention relates to a system and a method for providing a data analysis service in a cloud environment which does not need to transmit data to an...
US-9,459,896 Virtual machine merging method and system
A system, computer readable medium and method for merging a first virtual machine and a second virtual machine that runs on a same or different physical...
US-9,459,895 Virtual machine fault tolerance
In a computer system running at least a first virtual machine (VM) and a second VM on virtualization software, a computer implemented method for the second VM...
US-9,459,894 Active control of memory for java virtual machines and other application runtime environments
A method and structure for dynamic memory re-allocation for an application runtime environment (ARE) includes receiving, through an interface of an application...
US-9,459,893 Virtualization for diversified tamper resistance
A computer-implementable method includes providing an instruction set architecture that comprises features to generate diverse copies of a program, using the...
US-9,459,892 Optimization of virtual machines
A resource reservoir is provided. The resource reservoir is a pool of resources that are allocated to and shared between a plurality of reserve virtual...
US-9,459,891 Interface for interpartition and interprocessor communication
A system for reading and writing data to virtual machines in a machine operating according to the ARINC 653 standard includes a plurality of virtual machines...
US-9,459,890 Controlling real time during embedded system development
Disclosed herein are representative embodiments of methods, systems, and apparatus that can used to control real-time events (e.g., the real-time clock) during...
US-9,459,889 Systems and methods for context-aware application control
A method performed by an electronic device is described. The method includes obtaining sensor information. The method also includes identifying a class of an...
US-9,459,888 Implementing browser based hypertext transfer protocol session storage
A computer implemented method, apparatus, and computer usable program product for managing session data. The process determines whether preexisting session data...
US-9,459,887 Automatic graphical user interface creation
Techniques for automated graphical user interface (GUI) creation and/or rendering are provided. Establishments are defined via items for sale and rules defining...
US-9,459,886 Autonomous sleep mode
A system and method is disclosed that enables a peripheral or slave device to seamlessly transition in and out of sleep state while remaining completely...
US-9,459,885 Smart card module and operating method thereof
A smart module card and using method thereof are provided. The smart module card can be implemented in a peripheral platform having a transmitting port. The...
US-9,459,884 Self-healing using an alternate boot partition
Methods, apparatus and computer program products implement embodiments of the present invention that enable a computer system comprising networked computers to...
US-9,459,883 Modifying disk images
A method includes identifying a first boot configuration type for a disk image. The disk image includes a master boot record and a disk partition. The disk...
US-9,459,882 Monitoring circuit of semiconductor device to monitor a read-period signal during activation of a boot-up...
The monitoring circuit of a semiconductor device includes: a boot-up controller configured to generate a boot-up enable signal in response to a power-up signal...
US-9,459,881 Storage module and method for improving boot time during block binary searches
A storage controller is configured to find a last-written page in a block in a memory by sending a command to the memory to read a page of data, receiving at...
US-9,459,880 Information processing apparatus and output control method
An information processing apparatus includes a BIOS, a setting module, a determination module and a display controller. The setting module sets a display...
US-9,459,879 Systems and methods for thermal mitigation with multiple processors
A wireless communication device for thermal mitigation with multiple processors is described. The wireless communication device includes a first communications...
US-9,459,878 Verifying forwarding paths in pipelines
A tool for formally verifying forwarding paths in an information pipeline. The tool creates two logic design copies of the pipeline to be verified. The tool...
US-9,459,877 Nested speculative regions for a synchronization facility
An apparatus, computer readable medium, and method of performing nested speculative regions are presented. The method includes responding to entering a...
US-9,459,876 System, method, and computer program product for managing divergences and synchronization points during thread...
A system, method, and computer program product for ensuring forward progress of threads that implement divergent operations in a single-instruction, multiple...
US-9,459,875 Dynamic enablement of multithreading
Embodiments relate to dynamic enablement of multithreading. According to an aspect, a computer-implemented method for dynamic enablement of multithreading in a...
US-9,459,874 Instruction set architecture-based inter-sequencer communications with a heterogeneous resource
In one embodiment, the present invention includes a method for directly communicating between an accelerator and an instruction sequencer coupled thereto, where...
US-9,459,873 Run-time instrumentation monitoring of processor characteristics
The invention relates to monitoring processor characteristic information of a processor using run-time-instrumentation. An aspect of the invention includes...
US-9,459,872 High-word facility for extending the number of general purpose registers available to instructions
A computer employs a set of General Purpose Registers (GPRs). Each GPR comprises a plurality of portions. Programs such as an Operating System and Applications...
US-9,459,871 System of improved loop detection and execution
A method, system, and computer program product for identifying loop information corresponding to a plurality of loop instructions. The loop instructions are...
US-9,459,870 Data processor
A data processor includes: a plurality of controllers that process data; a program memory that stores a standby instruction and a data processing instruction at...
US-9,459,869 Intelligent caching for an operand cache
Instructions may require one or more operands to be executed, which may be provided from a register file. In the context of a GPU, however, a register file may...
US-9,459,868 Instruction to load data up to a dynamically determined memory boundary
A Load to Block Boundary instruction is provided that loads a variable number of bytes of data into a register while ensuring that a specified memory boundary...
US-9,459,867 Instruction to load data up to a specified memory boundary indicated by the instruction
A Load to Block Boundary instruction is provided that loads a variable number of bytes of data into a register while ensuring that a specified memory boundary...
US-9,459,866 Vector frequency compress instruction
A processor core that includes a hardware decode unit to decode a vector frequency compress instruction that includes a source operand and a destination...
US-9,459,865 Systems, apparatuses, and methods for performing a butterfly horizontal and cross add or substract in response...
Embodiments of systems, apparatuses, and methods for performing in a computer processor vector packed butterfly horizontal cross add or subtract of packed data...
US-9,459,864 Vector string range compare
Processing of character data is facilitated. A Vector String Range Compare instruction is provided that compares each element of a vector with a range of values...
US-9,459,863 System for assessing an application for tablet compatibility and quality
Applications that have been designed for a smaller format device such as a smartphone and simply ported to a larger format device such as a tablet can be...
US-9,459,862 Automated porting of application to mobile infrastructures
Techniques to automatically port applications to a mobile infrastructure using code separation with semantic guarantees are disclosed. Porting enterprise...
US-9,459,861 Systems and methods for detecting copied computer code using fingerprints
Systems and methods of detecting copying of computer code or portions of computer code involve generating unique fingerprints from compiled computer binaries....
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