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Patent # Description
US-9,471,326 Method and apparatus for differential checkpointing
A processor core stores information that maps a physical register to an architectural register in response to an instruction modifying the architectural...
US-9,471,325 Method and apparatus for selective renaming in a microprocessor
A method and apparatus for allowing an out-of-order processor to reuse an in-use physical register is disclosed herein. The method and apparatus uses...
US-9,471,324 Concurrent execution of heterogeneous vector instructions
A processor may include a vector functional unit that supports concurrent operations on multiple data elements of a maximum element size. The functional unit...
US-9,471,323 System and method of using an atomic data buffer to bypass a memory location
Methods and systems may provide for receiving a request to perform an atomic operation and adding the atomic operation to an execution pipeline of an arithmetic...
US-9,471,322 Early loop buffer mode entry upon number of mispredictions of exit condition exceeding threshold
Systems, processors, and methods for determining when to enter loop buffer mode early for loops in an instruction stream. A processor waits until a branch...
US-9,471,321 Method and apparatus for controlling fetch-ahead in a VLES processor architecture
There is provided a method for controlling fetch-ahead of Fetch Sets into a decoupling First In First Out (FIFO) buffer of a Variable Length Execution Set...
US-9,471,320 Using L1 cache as re-order buffer
A method is shown that eliminates the need for a dedicated reorder buffer register bank or memory space in a multi level cache system. As data requests from the...
US-9,471,319 System management and instruction counting
Techniques for managing a plurality of threads on a multi-threading processing core. Embodiments provide an instruction count threshold condition that...
US-9,471,318 System management and instruction counting
Techniques for managing a plurality of threads on a multi-threading processing core. Embodiments provide an instruction count threshold condition that...
US-9,471,317 Execution of additional instructions in conjunction atomically as specified in instruction field
A processor includes a plurality of execution units. At least one of the execution units is configured to determine, based on a field of a first instruction, a...
US-9,471,316 Using a single-instruction processor to process messages
The disclosed embodiments describe single-instruction processors that operates upon messages received from a network interface. A single-instruction processor...
US-9,471,315 Run-time instrumentation reporting
An aspect includes run-time instrumentation reporting. An instruction stream is executed by a processor. Run-time instrumentation information of the executing...
US-9,471,314 Auxiliary perceptron branch predictor with magnitude usage limit
According to an aspect, branch prediction in a processing system that includes a primary branch predictor and an auxiliary perceptron branch predictor is...
US-9,471,313 Flushing speculative instruction processing
Technical solutions are described for avoiding a transaction abort in a multiprocessor that supports transactional memory during out-of-order execution of an...
US-9,471,312 Instruction to load data up to a dynamically determined memory boundary
A Load to Block Boundary instruction is provided that loads a variable number of bytes of data into a register while ensuring that a specified memory boundary...
US-9,471,311 Vector checksum instruction
Elements from a second operand are added together one-by-one to obtain a first result. The adding includes performing one or more end around carry add...
US-9,471,310 Method, computer program product, and system for a multi-input bitwise logical operation
A method, computer program product, and system are provided for multi-input bitwise logical operations. The method includes the steps of receiving a multi-input...
US-9,471,309 Arithmetic processing apparatus and method for high speed processing of application
An arithmetic processing apparatus and method for high speed processing of an application are provided. The arithmetic processing apparatus may include a...
US-9,471,308 Vector floating point test data class immediate instruction
A Vector Floating Point Test Data Class Immediate instruction is provided that determines whether one or more elements of a vector specified in the instruction...
US-9,471,307 System and processor that include an implementation of decoupled pipelines
A system and apparatus are provided that include an implementation for decoupled pipelines. The apparatus includes a scheduler configured to issue instructions...
US-9,471,306 Information processing apparatus and copy control method
The information processing apparatus includes a creating unit and a control unit. On receiving an offloaded data transfer instruction, the creating unit creates...
US-9,471,305 Micro-coded transcendental instruction execution
A method for graphics processing includes generating one or more transcendental instructions in a graphics processing unit (GPU). Micro-code is formed for...
US-9,471,304 Tree-based versioning and merging
In various example embodiments, a version control server controls the versioning and modification of source code by representing the source code as a tree...
US-9,471,303 Facade framework for IDE
A framework for developing web and hybrid applications (Apps) of a project is described herein. In accordance with one aspect, a facade framework is provided....
US-9,471,302 Managing updates to different computer programs
Data updates to a record created under a computer program that involve data values of interest to a different record created under a different computer program...
US-9,471,301 Packaging content updates
Aspects of the present disclosure are directed to obtaining user feedback and causing a package of content updates to be created and distributed based on the...
US-9,471,300 Wireless firmware upgrades to an alarm security panel
A panel is described including stored data that is associated with the operation of the panel, and a server configured to provide a notification that an update...
US-9,471,299 Updating code within an application
Disclosed are various embodiments for providing updateable code to a software library executed in a client device. Updateable code includes scripting language...
US-9,471,298 Information processing apparatus, control method, and storage medium
A control method executed by an information processing apparatus, the control method includes deleting an application that is installed in the information...
US-9,471,297 Methods and apparatus for uninstalling a software application
Methods and apparatus for uninstalling an application are disclosed. When a user selects an application to be uninstalled, a database is queried to determine a...
US-9,471,296 Method and device for application installation to multiple memory components
A method and device for installing an application to a device are provided. The method includes: receiving, at the device, application files associated with the...
US-9,471,295 Method, device and computer program for the automatic installation or uninstallation of software modules on...
The automatic installation and uninstallation of software modules on equipment on an aircraft. For each reference of an obtained list of references of software...
US-9,471,294 Extensions for deployment patterns
Extension patterns are deployed to core deployment patterns stored in a first software repository. An event relating to registration of a component is detected....
US-9,471,293 System and method for administering pluggable user interactive system applications
Systems and methods are described that allow for multiple pluggable user interactive system (UIS) applications to be added or removed from a UIS system while...
US-9,471,292 Binary translation reuse in a system with address space layout randomization
Generally, this disclosure provides systems, methods and computer readable media for binary translation (BT) reuse. The system may include a (BT) module to...
US-9,471,291 Multi-processor code for modification for storage areas
A method for processing computer program code to enable different parts of the computer program code to be executed by different processing elements of a...
US-9,471,290 Utilizing special purpose elements to implement a FSM
Apparatus, systems, and methods for a compiler are described. One such compiler generates machine code corresponding to a set of elements including a general...
US-9,471,289 Compiler optimization for many integrated core processors
Systems and methods for source-to-source transformation for compiler optimization for many integrated core (MIC) coprocessors, including identifying data...
US-9,471,288 Compile based obfuscation
Compiler based obfuscation is described. To protect portions of a code project with obfuscations, the code is modified within a compiler to produce one or more...
US-9,471,287 Systems and methods for integrating widgets on mobile devices
Embodiments of a system and method are described for generating and distributing programming to mobile devices over a network. Devices are provided with Players...
US-9,471,286 System and method for providing code completion features for code modules
Systems and methods are described for providing code completion features for code modules that have been incorporated into a source code document being edited...
US-9,471,285 Identifying software components in a software codebase
Systems, methods, and computer program embodiments are disclosed for detecting third party software components in a software codebase. In an embodiment, a...
US-9,471,284 Apparatus, method, and non-transitory computer-readable storage medium
This invention provides an apparatus use environment with higher flexibility and convenience. To achieve this, in a program including the first program layer...
US-9,471,283 Generating virtualized application programming interface (API) implementation from narrative API documentation
A virtualized Application Program Interface (API) implementation is generated based upon narrative API documentation that includes sentences that describe the...
US-9,471,282 System and method for using annotations to automatically generate a framework for a custom javaserver faces...
A system and method for using annotations to automatically generate a framework for a custom JavaServer Faces (JSF) component is provided. Source code for a...
US-9,471,281 Vectorized Galois field multiplication
Embodiments relate to vectorized Galois field multiplication. An aspect includes a subdivision of first and second input operands into vector elements of equal...
US-9,471,280 Extraction of random numbers from physical systems
A method of generating a random bit string includes receiving a binary input string, creating copies of the binary input string received from the min-entropy...
US-9,471,279 Random number generation using untrusted quantum devices
A method of generating a sequence of random bits includes receiving a binary input signal from an input signal source and coupling the binary input signal into...
US-9,471,278 Low area full adder with shared transistors
A full adder is disclosed that utilizes low area. The full adder includes an exclusive NOR logic circuit. The exclusive NOR logic circuit receives a first input...
US-9,471,277 Program for correcting data measured by PS-OCT and PS-OCT system equipped with the program
Data measured by PS-OCT is corrected in a non-linear manner to enhance the quantitative analysis capability of PS-OCT and permit accurate quantitative...
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