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Patent # Description
US-9,478,686 Method for producing a photovoltaic cell having a heterojunction, and resulting photovoltaic cell
A method for producing a heterojunction solar cell including the following successive steps: providing a substrate made from crystalline semiconductor material,...
US-9,478,685 Vertical pillar structured infrared detector and fabrication method for the same
Photodetector devices and methods for making the photodetector devices are disclosed herein. In an embodiment, the device may include a substrate; and one or...
US-9,478,684 Three-layer core-shell nanoparticles for manufacturing solar cell light absorption layer and method of...
Disclosed are three-layer core-shell structure nanoparticles used to form a light absorption layer of solar cells including a core including a copper...
US-9,478,683 Sensor unit and solid-state imaging device
A sensor unit includes a metallic base member, a solid-state imaging element, and amplifier chips. The base member has a first placement surface and a second...
US-9,478,682 IR sensor package including a cover member and a sensor chip recessed into the package body
The infrared sensor includes: an infrared sensor chip in which a plurality of pixel portions each including a temperature-sensitive portion formed of a...
US-9,478,681 Fabrication of optical elements and modules incorporating the same
Fabricating a wafer-scale spacer/optics structure includes replicating optical replication elements and spacer replication sections directly onto an optics...
US-9,478,680 Solar cell and method for manufacturing the same, and solar cell module
A solar cell can include a substrate of a first conductive type; an emitter layer of a second conductive type opposite the first conductive type, and positioned...
US-9,478,679 Dielectric coating of the edge of a solar cell
A method of processing a solar cell is disclosed, where the edges of the solar cell are covered, coated or masked during the ion implantation process and/or the...
US-9,478,678 Front sheet of solar cell, method of manufacturing the same and photovoltaic module comprising the same
A front sheet of solar cell, a method of manufacturing the same and a photovoltaic module are provided. The front sheet of solar cell can effectively block...
US-9,478,677 Electronic device comprising an optical sensor chip
An electronic device includes a substrate plate with a traversing passage. An electronic component, mounted to the substrate plate, includes an integrated...
US-9,478,676 Light sensing device having a cover with a hole for passing light and method of selectively enabling light...
A light sensing device includes a substrate, a plurality of light sensing elements and a cover. The plurality of light sensing elements are disposed on the...
US-9,478,675 Method and apparatus for localizing and quenching an arc
The disclosure relates to a method for localizing and quenching an arc in a PV generator of a PV system, wherein the PV generator includes at least two PV...
US-9,478,674 Method of manufacturing a circuit board by punching
A method of manufacturing a circuit board includes: forming a plurality of metal electrodes so as to be separated from each other on a holding sheet by cutting...
US-9,478,673 Semiconductor device with trench structure and manufacturing method thereof
The semiconductor device of the present invention includes a semiconductor layer made of a wide bandgap semiconductor, a trench that is selectively formed on a...
US-9,478,672 Diode
A diode is provided which includes at least one diode element which has a plurality of N-type regions and a plurality of P-type regions, the N-type regions and...
US-9,478,671 Semiconductor device including a resistor and method for the formation thereof
A semiconductor structure includes a substrate and a resistor provided over the substrate. The resistor includes a first material layer, a second material...
US-9,478,670 Non-volatile semiconductor storage device
A non-volatile semiconductor storage device disclosed in the embodiment has a semiconductor substrate, a first insulating film, a first charge storage film, a...
US-9,478,669 Thin film transistor and display array substrate using same
A thin film transistor includes a gate electrode, a gate insulating layer, a channel layer, an etching stop layer, two contact holes, a source, and a drain. The...
US-9,478,668 Oxide semiconductor film and semiconductor device
To provide an oxide semiconductor film having stable electric conductivity and a highly reliable semiconductor device having stable electric characteristics by...
US-9,478,667 Thin film transistor substrate, method of manufacturing the same, and liquid crystal display panel having the same
A thin film transistor substrate includes a substrate, a bottom gate on the substrate, a first insulating layer on the substrate and on the bottom gate, a drain...
US-9,478,666 Thin film transistor, method for manufacturing the same, and display device comprising the same
A thin film transistor, a method of manufacturing the thin film transistor, and a display device including the thin film transistor are provided. The thin film...
US-9,478,665 Thin film transistor, method of manufacturing the same, display substrate and display apparatus
A thin film transistor is disclosed in the present invention. The thin film transistor comprises: a substrate, an active layer, a first etching barrier layer, a...
US-9,478,664 Semiconductor device
A change in electrical characteristics is suppressed and reliability in a semiconductor device using a transistor including an oxide semiconductor is improved....
US-9,478,663 FinFET device including a uniform silicon alloy fin
A method includes forming a fin on a semiconductor substrate and forming recesses on sidewalls of the fin. A silicon alloy material is formed in the recesses. A...
US-9,478,662 Gate and source/drain contact structures for a semiconductor device
One illustrative device disclosed herein includes, among other things, a dielectric layer disposed above a source/drain region and a gate structure of a...
US-9,478,661 Semiconductor device structures with self-aligned fin structure(s) and fabrication methods thereof
Semiconductor device structures having fin structure(s) and fabrication methods thereof are presented. The methods include: providing a first mask above a...
US-9,478,660 Protection layer on fin of fin field effect transistor (FinFET) device structure
A fin field device structure and method for forming the same are provided. The FinFET device structure includes a substrate and a fin structure extending from...
US-9,478,659 FinFET having doped region and method of forming the same
A transistor includes a substrate having an upper surface, a fin structure protruding from the upper surface of the substrate, an isolation structure over the...
US-9,478,658 Device and method for fabricating thin semiconductor channel and buried strain memorization layer
A device and method for inducing stress in a semiconductor layer includes providing a substrate having a dielectric layer formed between a first semiconductor...
US-9,478,657 High gain device
A method of forming a device is disclosed. A substrate having a high gain (HG) device region for a HG transistor is provided. A HG gate is formed on the...
US-9,478,656 Method for fabricating a field effect transistor with local isolations on raised source/drain trench sidewalls
A method is provided for fabricating a semiconductor device. The method includes providing a semiconductor substrate having a gate structure; and forming offset...
US-9,478,655 Semiconductor device having a lower diode region arranged below a trench
A semiconductor device includes a semiconductor body and at least one device cell integrated in the semiconductor body. Each device cell includes: a drift...
US-9,478,654 Method for manufacturing semiconductor device with tensile stress
A semiconductor device, and a method for manufacturing the same, comprises a source/drain region formed using a solid phase epitaxy (SPE) process to provide...
US-9,478,653 Field effect transistor and semiconductor device
A field effect transistor includes multi-finger electrodes, a gate terminal electrode, a drain terminal electrode, a source terminal and a source terminal...
US-9,478,652 Monolithic integrated circuit (MMIC) structure having composite etch stop layer and method for forming such...
A method for forming a semiconductor structure having a transistor device with a control electrode for controlling a flow of carriers between a first electrode...
US-9,478,651 Breakdown voltage multiplying integration scheme
A circuit includes a first field effect transistor having a gate, a first drain-source terminal, and a second drain-source terminal; and a second field effect...
US-9,478,650 Semiconductor device, HEMT device, and method of manufacturing semiconductor device
Provided is a semiconductor device in which a reverse leakage current is suppressed and the mobility of a two-dimensional electron gas is high. A semiconductor...
US-9,478,649 Semiconductor device
A semiconductor device includes: metal collector layer on backside, P-type collector layer, N-type field stop layer, N-drift layer and N-type CS layer within...
US-9,478,648 Semiconductor device
A shield electrode is formed above a floating p region in a semiconductor layer and connected to a gate electrode in a trench. The shield electrode is composed...
US-9,478,647 Semiconductor device
A semiconductor device is configured such that the distance between the trench gate in the IGBT and the trench gate in the diode is reduced or a p-well layer is...
US-9,478,646 Methods for fabricating anode shorted field stop insulated gate bipolar transistor
A method for fabricating an anode-shorted field stop insulated gate bipolar transistor (IGBT) comprises selectively forming first and second semiconductor...
US-9,478,645 Bidirectional device, bidirectional device circuit and power conversion apparatus
Provided is a longitudinal bidirectional device in which current flows in a layering direction of a semiconductor layered portion formed on a front surface of a...
US-9,478,644 Semiconductor device
The invention provides a semiconductor device, including a buried oxide layer disposed on a substrate. A semiconductor layer having a first conduction type is...
US-9,478,643 Memory structure with self-aligned floating and control gates and associated methods
A memory structure having at least substantially aligned floating and control gates. Such a memory structure can include a control gate material disposed...
US-9,478,642 Semiconductor junction formation
A semiconductor structure, such as a FinFET, etc., includes a bi-portioned junction. The bi-portioned junction includes a doped outer portion and a doped inner...
US-9,478,641 Method for fabricating FinFET with separated double gates on bulk silicon
Disclosed herein is a method for fabricating a FinFET with separated double gates on a bulk silicon, comprising: forming a pattern for a source, a drain and a...
US-9,478,640 LDMOS device with step-like drift region and fabrication method thereof
An LDMOS device is disclosed. The LDMOS device includes: a substrate having a first type of conductivity; a drift region having a second type of conductivity...
US-9,478,639 Electrode-aligned selective epitaxy method for vertical power devices
A method of forming trench electrode structures includes forming a first dielectric layer on a semiconductor substrate, forming a second layer above the first...
US-9,478,638 Resistive switching random access memory with asymmetric source and drain
The present disclosure provides one embodiment of a resistive random access memory (RRAM) structure. The RRAM structure includes a resistive memory element...
US-9,478,637 Scaling EOT by eliminating interfacial layers from high-K/metal gates of MOS devices
An integrated circuit structure includes a semiconductor substrate, and a phonon-screening layer over the semiconductor substrate. Substantially no silicon...
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