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Patent # Description
US-9,484,426 Metal contacts to group IV semiconductors by inserting interfacial atomic monolayers
Techniques for reducing the specific contact resistance of metal-semiconductor (group IV) junctions by interposing a monolayer of group V or group III atoms at...
US-9,484,425 Biased reactive refractory metal nitride capped contact of group III-V semiconductor device
According to one disclosed embodiment, an electrical contact for use on a semiconductor device comprises an electrode stack including a plurality of metal...
US-9,484,424 Semiconductor device with a NAND circuit having four transistors
A semiconductor device includes a two-input NAND circuit including four MOS transistors arranged in a line. Each of the MOS transistors is disposed on a planar...
US-9,484,423 Crystalline multiple-nanosheet III-V channel FETs
A field effect transistor includes a body layer comprising a crystalline semiconductor channel region therein, and a gate stack on the channel region. The gate...
US-9,484,422 High-voltage metal-oxide semiconductor transistor
The present invention provides a high-voltage metal-oxide-semiconductor (HVMOS) transistor comprising a substrate, a gate dielectric layer, a gate electrode and...
US-9,484,421 Semiconductor device
A semiconductor device according to an embodiment includes a nitride semiconductor layer, a plurality of source electrodes provided on the nitride semiconductor...
US-9,484,420 Thin film transistor substrate, liquid crystal display having same, and method of manufacturing the same
A display apparatus includes a thin film transistor substrate, a substrate facing the thin film transistor substrate, and a liquid crystal layer. The thin film...
US-9,484,419 Oxide thin film, method for post-treating oxide thin film and electronic apparatus
Provided are an oxide thin film, a method for post-treating an oxide thin film and an electronic apparatus. An oxide thin film is an oxide thin film with a...
US-9,484,418 Semiconductor device
The semiconductor device includes a substrate, a first GaN field effect transistor, a second GaN field effect transistor, and a GaN diode. The first GaN field...
US-9,484,417 Methods of forming doped transition regions of transistor structures
Methods of forming doped transition regions of transistor structures are provided herein. The methods include, for instance: providing a first semiconductor...
US-9,484,416 Silicon carbide substrate, semiconductor device and methods for manufacturing them
A silicon carbide substrate capable of reducing on-resistance and improving yield of semiconductor devices is made of single-crystal silicon carbide, and sulfur...
US-9,484,415 Semiconductor device and method for manufacturing the same
According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, and a third semiconductor region. The...
US-9,484,414 Semiconductor device
A MOSFET includes a silicon carbide substrate including a main surface having an off angle with respect to a {0001} plane and a source electrode formed in...
US-9,484,413 Methods of forming buried junction devices in silicon carbide using ion implant channeling and silicon carbide...
A semiconductor device structure according to some embodiments includes a silicon carbide substrate having a first conductivity type, a silicon carbide drift...
US-9,484,412 Strained silicon--germanium integrated circuit with inversion capacitance enhancement and method to fabricate same
A structure includes a substrate; a plurality of pFET fins disposed over the substrate; and a plurality of nFET fins disposed over the substrate. In the...
US-9,484,411 Integrated circuit and a method to optimize strain inducing composites
A method to design an IC is disclosed to provide a uniform deposition of strain-inducing composites is disclosed. The method to design the IC comprises,...
US-9,484,410 Lateral MOS power transistor having front side drain electrode and back side source electrode
A semiconductor component may include a semiconductor layer which has a front side and a back side, a first terminal electrode on the front side, a second...
US-9,484,409 Semiconductor devices including channel dopant layer
A semiconductor device includes a semiconductor substrate including a well dopant layer having a first conductivity type, a gate electrode on the well dopant...
US-9,484,408 Bipolar junction transistor layout
A bipolar junction transistor includes an emitter, a base contact, a collector and a shallow trench isolation. The base contact has two base fingers that form a...
US-9,484,407 Methods of forming a nanowire transistor device
A semiconductor device is provided including a semiconductor substrate and a nanowire formed over the semiconductor substrate and wherein the nanowire includes...
US-9,484,406 Method for fabricating nanowires for horizontal gate all around devices for semiconductor applications
The present disclosure provide methods for forming nanowire structures with desired materials horizontal gate-all-around (hGAA) structures field effect...
US-9,484,405 Stacked nanowire devices formed using lateral aspect ratio trapping
A method for manufacturing a semiconductor device comprises depositing alternating layers of a plurality of first dielectric layers and a plurality of second...
US-9,484,404 Electronic device of vertical MOS type with termination trenches having variable depth
An electronic device is integrated on a chip of semiconductor material having a main surface and a substrate region with a first type of conductivity. The...
US-9,484,403 Boron rich nitride cap for total ionizing dose mitigation in SOI devices
A semiconductor-on-insulator (SOI) structure that includes a cap layer composed of a boron-rich compound or doped boron nitride located between a top...
US-9,484,402 Fabricating shallow-trench isolation semiconductor devices to reduce or eliminate oxygen diffusion
A method is disclosed for forming a semiconductor device. A first opening is formed for an STI on a semiconductor substrate and a first process is performed to...
US-9,484,401 Capacitance reduction for advanced technology nodes
After forming source/drain contact trenches to expose source/drain regions, contact liner material layer portions are formed on sidewalls and bottom surfaces of...
US-9,484,400 Method of forming a super junction semiconductor device having stripe-shaped regions of the opposite...
A super junction semiconductor device is formed by forming at least a portion of a drift layer on a doped layer of a first conductivity type, implanting first...
US-9,484,399 Charge compensation device and manufacturing therefor
A charge-compensation semiconductor device includes a semiconductor body having a first surface, a lateral edge delimiting the semiconductor body in a...
US-9,484,398 Metal-insulator-metal (MIM) capacitor
There is disclosed a metal-insulator-metal, MIM, capacitor. The MIM capacitor comprises a MIM stack formed within an interconnect metal layer. The interconnect...
US-9,484,397 Component-embedded substrate
A component-embedded substrate having a multilayer substrate formed by laminating a plurality of thermoplastic sheets in a predetermined direction, an internal...
US-9,484,396 Array substrate, method for manufacturing the same, display device and electronic product
The present disclosure provides an array substrate, including a plurality of sub-pixel regions arranged in a matrix form. Each sub-pixel region may at least...
US-9,484,395 Method of manufacturing organic light emitting display panel
The present invention relates to a method of manufacturing an organic light emitting display panel. The method includes forming a light shielding layer on a...
US-9,484,394 Display device and electronic apparatus
A display device includes a first substrate including an organic layer forming region, and an organic layer non-forming region which is provided on an outer...
US-9,484,393 Array substrate of a display device, manufacturing method thereof
An array substrate, a manufacturing method thereof and a display device are disclosed. The array substrate comprises a base substrate and a thin-film transistor...
US-9,484,392 Flat panel display having low reflective black matrix and method for manufacturing the same
A flat panel display having a low reflective black matrix and a method for manufacturing the same are provided. The flat panel display includes a substrate...
US-9,484,391 OLED with chamfered emission layer
An organic light emitting diode display includes a first electrode, a pixel defining layer positioned on the first electrode and including a first opening...
US-9,484,390 Method for fabricating semiconductor apparatus
A method for fabricating a semiconductor apparatus includes forming a diffusion barrier film on a semiconductor substrate, forming a first film on a...
US-9,484,389 Three-dimensional resistive memory array
A method for manufacturing a three-dimensional resistive memory array is disclosed. The method comprises forming a repetitive sequence comprising an isolating...
US-9,484,388 Light-emitting device, method for designing light-emitting device, method for driving light-emitting device,...
A light-emitting device that can implement a natural, vivid, highly visible and comfortable appearance of colors and appearance of objects as if the objects are...
US-9,484,387 Manufacturing method of semiconductor device and semiconductor device
A method of manufacturing a stacked semiconductor device having two or more wafers may include forming a conductor on an upper wafer, the conductor configured...
US-9,484,386 Diffraction grating with multiple periodic widths
An integrated circuit includes a substrate, a plurality of photo detectors formed in the substrate, and a diffraction grating having multiple sections disposed...
US-9,484,385 Method for fabricating an image sensor package
An image sensor package and method for fabricating the same is provided. The image sensor package includes a first substrate comprising a via hole therein, a...
US-9,484,384 Array substrate of X-ray sensor and method for manufacturing the same
An array substrate of an X-ray sensor and a method for manufacturing the same are provided, the method comprising a step of forming a thin-film transistor...
US-9,484,383 Solid-state image pickup device, method of manufacturing thereof, and electronic apparatus
Provided is a solid-state image pickup device including: a plurality of pixels, each of which includes a photoelectric conversion portion and a pixel transistor...
US-9,484,382 Image sensor and manufacturing method thereof
According to one embodiment, an image sensor includes an image-sensing element region formed by arranging a plurality of image-sensing elements on a...
US-9,484,381 Display device and method for driving display device
A display device includes a pixel which includes a first photosensor portion having a first photodiode for detecting visible light, which is provided together...
US-9,484,380 Backside illumination (BSI) image sensor and manufacturing method thereof
A back side illumination image sensor includes a substrate including a front side and a back side opposite to the front side, a plurality of sensing elements...
US-9,484,379 Rear-face illuminated solid state image sensors
A microelectronic unit includes a semiconductor element having a front surface to which a packaging layer is attached, and a rear surface remote from the front...
US-9,484,378 Semiconductor devices including back-side integrated circuitry
Semiconductor devices may include a semiconductor substrate comprising at least one of transistors and capacitors may be located at an active surface of the...
US-9,484,377 CMOS image sensor including infrared pixels having improved spectral properties, and method of manufacturing same
The present invention relates to a CMOS image sensor including an infrared pixel with enhanced spectral characteristics in which a stepped portion is formed...
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