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Patent # Description
US-9,484,376 Semiconductor isolation structure and manufacturing method thereof
The present disclosure provides a method for manufacturing a semiconductor isolation structure, including providing a substrate with a top surface; forming a...
US-9,484,375 Image sensor with 3D stack structure
Disclosed is an image sensor with a 3D stack structure, in which pixels of a top plate are realized as image pixels and pixels of a bottom plate are realized as...
US-9,484,374 Image sensor and method for fabricating the same
An image sensor includes a substrate including a pixel array region and a logic region where a surface of the pixel array region is higher than a surface of the...
US-9,484,373 Hard mask as contact etch stop layer in image sensors
An image sensor includes a semiconductor material with a photodiode disposed in the semiconductor material, and a transfer gate disposed adjacent to an edge of...
US-9,484,372 Substrate for embedding imaging device and method for manufacturing same, and imaging apparatus
A substrate for embedding an imaging device includes: a core layer; a first multilayered wiring layer that is formed onto the core layer, the core layer and the...
US-9,484,371 Solid-state image pickup device and method of driving the same
An image sensor comprising a semiconductor substrate with a plurality of photoelectric conversion elements and a charge-voltage conversion element. The...
US-9,484,370 Isolated global shutter pixel storage structure
A pixel cell includes a photodiode disposed in a semiconductor material to accumulate image charge in response to incident light directed to the photodiode. A...
US-9,484,369 Solid-state imaging device, method of manufacturing the same, and imaging apparatus
A solid-state imaging device includes a photoelectric conversion section which is disposed on a semiconductor substrate and which photoelectrically converts...
US-9,484,368 Solid-state imaging device, method for manufacturing solid-state imaging device, method for manufacturing...
A solid-state imaging device includes a semiconductor substrate configured to include a solid-state imaging element that is provided with a photoelectric...
US-9,484,367 Germanium photodetector schottky contact for integration with CMOS and Si nanophotonics
A method of forming an integrated photonic semiconductor structure having a photodetector device and a CMOS device may include depositing a dielectric stack...
US-9,484,366 Photodiode array
A photodiode array has a plurality of photodetector channels formed on an n-type substrate having an n-type semiconductor layer, with a light to be detected...
US-9,484,365 Semiconductor device including switch electrically connected to signal line
To suppress variation of a signal in a semiconductor device. By suppressing the variation, formation of a stripe pattern in displaying an image on a...
US-9,484,364 Array substrate and method for manufacturing the same, display device
An array substrate and a display device are presented. The array substrate includes: a base substrate and a plurality of thin film transistor units located on...
US-9,484,363 Liquid crystal display and method of manufacturing the same
A liquid crystal display and a method of manufacturing the same are provided. The liquid crystal display includes an insulating substrate, a gate electrode...
US-9,484,362 Display substrate and method of manufacturing a display substrate
A display substrate includes an active pattern, a gate electrode, a first insulation layer and a pixel electrode. The active pattern is disposed on a base...
US-9,484,361 Array substrate, manufacturing method thereof, display panel and display device
The present disclosure provides an array substrate, a manufacturing method thereof, a display panel and a display device. A base substrate of the array...
US-9,484,360 Method for manufacturing oxide thin film transistor (TFT) array substrate
The present disclosure provides a method for manufacturing an oxide thin film transistor (TFT) array substrate. Specifically the step of forming the thin film...
US-9,484,359 MOSFET with work function adjusted metal backgate
An SOI substrate, a semiconductor device, and a method of backgate work function tuning. The substrate and the device have a plurality of metal backgate regions...
US-9,484,358 Ultrahigh density vertical NAND memory device and method of making thereof
Monolithic, three dimensional NAND strings include a semiconductor channel, at least one end portion of the semiconductor channel extending substantially...
US-9,484,357 Selective blocking dielectric formation in a three-dimensional memory structure
A plurality of blocking dielectric portions can be formed between a memory stack structure and an alternating stack of first material layers and second material...
US-9,484,356 Semiconductor structure and method for manufacturing the same
A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a substrate, a stack of alternate...
US-9,484,355 Semiconductor device and method for fabricating the same
A semiconductor device includes a substrate, a stack structure, peripheral gate structures and residual spacers. The substrate includes a cell array region and...
US-9,484,354 Semiconductor device including different orientations of memory cell array and peripheral circuit transistors
A memory device includes a memory cell on a first region of a substrate. An active region is in a second region neighboring the first region of the substrate,...
US-9,484,353 Memory device and method for fabricating the same
A memory device includes a first insulating layer, a second insulating layer, an isolation layer, a floating gate electrode, a control gate electrode, a channel...
US-9,484,352 Method for forming a split-gate flash memory cell device with a low power logic device
An embedded flash memory device is provided. A gate stack includes a control gate arranged over a floating gate. An erase gate is arranged adjacent to a first...
US-9,484,351 Split gate memory device and method of fabricating the same
The present disclosure relates to a split gate memory device which requires less number of processing steps than traditional baseline processes and methods of...
US-9,484,350 Semiconductor device having an inter-layer via (ILV), and method of making same
A three dimensional semiconductor device includes a first memory device, a second memory device and a via. The via connects the first memory device to the...
US-9,484,349 Static random access memory
A static random access memory (SRAM) including at least a SRAM cell is provided. A gate layout of the SRAM cell includes first to fourth strip doped regions, a...
US-9,484,348 Structure and method to increase contact area in unmerged EPI integration for CMOS FinFETs
Source/drain contact structures with increased contact areas for a multiple fin-based complementary metal oxide semiconductor field effect transistor (CMOSFET)...
US-9,484,347 FinFET CMOS with Si NFET and SiGe PFET
A method for forming a complementary metal oxide semiconductor (CMOS) device includes growing a SiGe layer on a Si semiconductor layer, and etching fins through...
US-9,484,346 Semiconductor structure and manufacturing method thereof
The present disclosure provides a semiconductor structure includes a semiconductor layer having a first and a second surface, and an interlayer dielectric (ILD)...
US-9,484,344 Semiconductor apparatus
A semiconductor apparatus includes a reservoir capacitor, and the reservoir capacitor includes a plurality of MOS capacitors serially coupled to one another....
US-9,484,343 Insulated gate bipolar transistor with a free wheeling diode
A method for manufacturing a semiconductor device suppresses loss of vacuum in a chamber of an ion implanter, sag of a resist mask pattern for ion implantation,...
US-9,484,342 Semiconductor apparatus
A semiconductor apparatus includes a substrate; a nitride semiconductor layer formed on the substrate; a transistor formed on the nitride semiconductor layer,...
US-9,484,341 Mom capacitor circuit and semiconductor device thereof
A capacitor circuit formed by a plurality of capacitors using metal electrodes formed on a substrate is provided, such that the capacitance of the capacitor can...
US-9,484,340 Semiconductor device and method of manufacturing the same
Both a HEMT and a SBD are formed on a nitride semiconductor substrate. The nitride semiconductor substrate comprises a HEMT gate structure region and an anode...
US-9,484,339 Smart semiconductor switch
A semiconductor device may comprise a semiconductor substrate, which is doped with dopants of a first doping type and includes a semiconductor layer adjoining a...
US-9,484,338 Diode string implementation for electrostatic discharge protection
A diode string having a plurality of diodes for ESD protection of a CMOS IC device comprises a first diode and a last diode in the diode string, wherein the...
US-9,484,337 Circuit protection device
A circuit protection device is provided and includes a first insulation layer, a second insulation layer, a thermal fuse, a diode, a first exterior electrode...
US-9,484,336 Semiconductor device, semiconductor device mounting structure and power semiconductor device
A semiconductor device includes a plurality of die pad sections, a plurality of semiconductor chips, each of which is arranged in each of the die pad sections,...
US-9,484,335 Semiconductor device with buried bitline and method for fabricating the same
A method for fabricating a semiconductor device includes forming active regions which are separated by a plurality of first trenches, forming supports which...
US-9,484,334 Semiconductor device and method of forming directional RF coupler with IPD for additional RF signal processing
A semiconductor device has a substrate and RF coupler formed over the substrate. The RF coupler has a first conductive trace with a first end coupled to a first...
US-9,484,333 Multi-chip module with stacked face-down connected dies
A microelectronic assembly can include a substrate having first and second surfaces, at least two logic chips overlying the first surface, and a memory chip...
US-9,484,332 Micro solar cell powered micro LED display
Micro LEDs may be placed on a substrate in regularly spaced rows with an empty row between at least two successive rows of micro LED. A micro solar cell may...
US-9,484,331 Semiconductor device and manufacturing method thereof
A semiconductor device and manufacturing method thereof. Various aspects of the disclosure may, for example, comprise forming a back end of line layer on a...
US-9,484,330 Light-emitting device
A light-emitting device includes light-emitting units and an electrical connection layer. Each light-emitting unit includes a light-emitting stacking layer, a...
US-9,484,329 Light emitter array layout for color mixing
Solid state lighting components are disclosed having multiple discrete light sources whose light combines to provide the desired emission characteristics. One...
US-9,484,328 Backside through silicon vias and micro-channels in three dimensional integration
Technologies are generally described related to electrical connectivity and heat mitigation in three dimensional integrated circuit (IC) integration through...
US-9,484,327 Package-on-package structure with reduced height
To achieve a package-on-package having an advantageously reduced height, a first package substrate has a window sized to receive a second package die. The first...
US-9,484,326 Apparatuses having stacked devices and methods of connecting dice stacks
Various embodiments include apparatuses having stacked devices and methods of forming dice stacks on an interface die. In one such apparatus, a dice stack...
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