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Patent # Description
US-9,490,372 Method of forming a semiconductor device termination and structure therefor
At least one embodiment is directed to a semiconductor edge termination structure, where the edge termination structure comprises several doped layers and a...
US-9,490,371 Nonvolatile memory devices and methods of fabricating the same
A nonvolatile memory device includes a gate structure including inter-gate insulating patterns that are vertically stacked on a substrate and gate electrodes...
US-9,490,370 Semiconductor device
The semiconductor device includes a source line, a bit line, a signal line, a word line, memory cells connected in parallel between the source line and the bit...
US-9,490,369 Semiconductor device
High field-effect mobility is provided for a transistor including an oxide semiconductor. Further, a highly reliable semiconductor device including the...
US-9,490,368 Semiconductor device and manufacturing method of the same
One object is to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. Another object...
US-9,490,366 Thin film transistor, amorphous silicon flat detection substrate and manufacturing method
A thin film transistor, an amorphous silicon flat detection substrate and a manufacturing method are provided. The material for a source electrode and a drain...
US-9,490,365 Structure and formation method of fin-like field effect transistor
A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a fin structure over...
US-9,490,364 Semiconductor transistor having a stressed channel
A process is described for manufacturing an improved PMOS semiconductor transistor. Recesses are etched into a layer of epitaxial silicon. Source and drain...
US-9,490,363 Tunneling field effect transistor having a three-side source and fabrication method thereof
The present invention discloses a tunneling field effect transistor having a three-side source and a fabrication method thereof, referring to field effect...
US-9,490,362 Semiconductor device production method and semiconductor device
A semiconductor device production method includes a first step of forming a planar silicon layer on a silicon substrate and forming first and second...
US-9,490,361 Canyon gate transistor and methods for its fabrication
Lithographic limitations on gate and induced channel length in MOSFETS are avoided by forming non-planar MOSFETS in a cavity extending into a semiconductor...
US-9,490,360 Semiconductor device and operating method thereof
Provided is a semiconductor device including a P-type substrate, a P-type first well region, an N-type second well region, a gate, N-type source and drain...
US-9,490,359 Superjunction semiconductor device with columnar region under base layer and manufacturing method therefor
A semiconductor device that includes the following is manufactured: an n.sup.- base layer; a p-type base layer formed on the surface of the n.sup.- base layer;...
US-9,490,358 Electronic device including a vertical conductive structure
An electronic device can include a buried conductive region and a semiconductor layer over the buried conductive region. The electronic device can further...
US-9,490,357 Vertical III-nitride semiconductor device with a vertically formed two dimensional electron gas
A HEMT device comprising a III-Nitride material substrate, the surface of which follows a plane that is not parallel to the C-plane of the III-Nitride material;...
US-9,490,356 Growth of high-performance III-nitride transistor passivation layer for GaN electronics
Methods for forming a high-quality III-nitride passivation layer on an AlGaN/GaN HEMT. A III-nitride passivation layer is formed on the surface of an AlGaN/GaN...
US-9,490,355 Silicon carbide static induction transistor and process for making a silicon carbide static induction transistor
A static induction transistor is formed on a silicon carbide substrate doped with a first conductivity type. First recessed regions in a top surface of the...
US-9,490,354 Insulated gate bipolar transistor
A semiconductor body of an IGBT includes: a first base region of a second conductivity type; a source region of a first conductivity type different from the...
US-9,490,353 Three terminal PIN diode
This disclosure describes a switch having a collector, base, emitter, and an intrinsic region between the collector and base. The intrinsic region increases the...
US-9,490,352 Bipolar transistor with carbon alloyed contacts
A method for forming a bipolar junction transistor includes forming a collector intrinsic region, an emitter intrinsic region and an intrinsic base region...
US-9,490,351 Semiconductor device and method of manufacturing semiconductor device
An object is to provide a highly reliable semiconductor device having stable electric characteristics by using an oxide semiconductor film having stable...
US-9,490,350 Transistor, liquid crystal display device, and manufacturing method thereof
Photolithography and etching steps for forming an island-shaped semiconductor layer are omitted, and a liquid crystal display device is manufactured with four...
US-9,490,349 Method of manufacturing a semiconductor device
A method of manufacturing a semiconductor device, which includes the steps of forming a gate stack structure made up of a floating gate, an inter-poly...
US-9,490,348 Method of forming a FinFET having an oxide region in the source/drain region
Embodiments of the present disclosure include a semiconductor device, a FinFET device, and methods for forming the same. An embodiment is a semiconductor device...
US-9,490,347 Capping dielectric structures for transistor gates
The present description relates to the field of fabricating microelectronic transistors, including non-planar transistors, for microelectronic devices....
US-9,490,346 Structure and formation method of fin-like field effect transistor
A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a fin structure over...
US-9,490,345 Semiconductor device and manufacturing method thereof
A semiconductor device includes a gate structure on a substrate; a raised source/drain region adjacent to the gate structure; and an interconnect plug on the...
US-9,490,344 Methods of making transistor devices with elevated source/drain regions to accommodate consumption during metal...
Disclosed herein are various semiconductor devices with dual metal silicide regions and to various methods of making such devices. One illustrative method...
US-9,490,342 Method for fabricating semiconductor device
A method for fabricating a semiconductor device includes the following steps. Firstly, a dummy gate structure having a dummy gate electrode layer is provided....
US-9,490,341 Semiconductor device having metal gate and method for manufacturing semiconductor device having metal gate
A method for manufacturing a semiconductor device having metal gate includes following steps. A substrate is provided. At least a transistor including a dummy...
US-9,490,340 Methods of forming nanowire devices with doped extension regions and the resulting devices
A method of forming a nanowire device includes patterning a plurality of semiconductor material layers such that each layer has first and second exposed end...
US-9,490,339 Semiconductor device having improved contact area
A semiconductor device forms a salicide layer to surround an upper surface and a circumference of a lateral surface of a pillar. A contact area between the...
US-9,490,338 Silicon carbide semiconductor apparatus and method of manufacturing same
A silicon carbide vertical MOSFET having low ON-resistance and high blocking voltage is provided. For this, a first deposition film (2) of low concentration...
US-9,490,337 Semiconductor device and method for fabricating the same
A semiconductor device includes: a plurality of n type pillar regions and an n- type epitaxial layer disposed on a first surface of an n+ type silicon carbide...
US-9,490,336 Fabrication methodology for optoelectronic integrated circuits
A method of forming an integrated circuit includes depositing a multilayer metal stack on at least one contact layer of semiconductor material. The multilayer...
US-9,490,335 Extra gate device for nanosheet
A method for forming semiconductor devices includes forming a highly doped region. A stack of alternating layers is formed on the substrate. The stack is...
US-9,490,334 Semiconductor device having metal gate and manufacturing method thereof
A semiconductor device having metal gate includes a substrate, a first metal gate positioned on the substrate, and a second metal gate positioned on the...
US-9,490,333 Anti-fuse and method for forming the same
An anti-fuse includes a first gate structure disposed in a semiconductor substrate and a second gate structure that is spaced apart from the first gate...
US-9,490,332 Atomic layer doping and spacer engineering for reduced external resistance in finFETs
A structure includes a fin having a gate structure disposed on a portion of a surface and an initial spacer layer disposed on the fin and gate structure. There...
US-9,490,331 Formation of semiconductor arrangement comprising buffer layer and semiconductor column overlying buffer layer
A semiconductor arrangement and methods of formation are provided. A semiconductor arrangement includes a semiconductor column on a buffer layer over a...
US-9,490,330 Controlling GaAsP/SiGe interfaces
Initiation conditions and strain techniques are described that enable forming high quality GaAsP semiconductor material on an SiGe semiconductor material with...
US-9,490,329 Semiconductor devices with germanium-rich active layers and doped transition layers
Semiconductor device stacks and devices made there from having Ge-rich device layers. A Ge-rich device layer is disposed above a substrate, with a p-type doped...
US-9,490,328 Silicon carbide semiconductor device and manufacturing method of the same
In order to provide a high-performance and reliable silicon carbide semiconductor device, in a silicon carbide semiconductor device including an n-type SiC...
US-9,490,327 Semiconductor device and method of manufacturing the same
A semiconductor device according to an embodiment includes: a semiconductor substrate; an n-type SiC layer provided on one side of the semiconductor substrate;...
US-9,490,326 Wafer formed by slicing an ingot
The instant disclosure relates to a wafer formed by slicing an ingot. The wafer has at least one side surface adjacent to the slicing path and topped with a...
US-9,490,325 Structures and devices including a tensile-stressed silicon arsenic layer and methods of forming same
Structures including a tensile-stressed silicon arsenic layer, devices including the structures, and methods of forming the devices and structures are...
US-9,490,324 N-polar III-nitride transistors
An N-polar III-N transistor includes a III-N buffer layer, a first III-N barrier layer, and a III-N channel layer, the III-N channel layer having a gate region...
US-9,490,323 Nanosheet FETs with stacked nanosheets having smaller horizontal spacing than vertical spacing for large...
A device including a stacked nanosheet field effect transistor (FET) may include a substrate, a first channel pattern on the substrate, a second channel pattern...
US-9,490,322 Semiconductor device with enhanced 3D resurf
A device includes a semiconductor substrate, source and drain regions in the semiconductor substrate and spaced from one another along a first lateral...
US-9,490,321 Optoelectronic integrated circuit
A semiconductor device includes a substrate supporting a plurality of layers that include at least one modulation doped quantum well (QW) structure offset from...
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