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Patent # Description
US-9,502,532 Methods of manufacturing semiconductor devices
Provided is a method of manufacturing a semiconductor device including: forming a gate electrode structure on an active region of a semiconductor substrate;...
US-9,502,531 Semiconductor device having fin-type field effect transistor and method of manufacturing the same
A semiconductor device includes a substrate having a first region and a second region, a first MOS transistor including a first fin structure and a first gate...
US-9,502,530 Method of manufacturing semiconductor devices
A method of manufacturing a semiconductor device including the steps of providing a substrate having first type semiconductor regions and second type...
US-9,502,529 Metal oxide semiconductor having epitaxial source drain regions and a method of manufacturing same using dummy...
A semiconductor device in which sufficient stress can be applied to a channel region due to lattice constant differences.
US-9,502,528 Borderless contact formation through metal-recess dual cap integration
An improved semiconductor structure and methods of fabrication that provide improved transistor contacts in a semiconductor structure are provided. A first...
US-9,502,527 Semiconductor device structure having multi-layered insulating cap layers over metal gate
A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure further...
US-9,502,526 Semiconductor device and method for forming the same
A semiconductor device includes a semiconductor substrate including a trench, a gate insulation film located over a bottom and sidewall of the trench, a first...
US-9,502,525 Compound semiconductor device and method of manufacturing the same
An embodiment of a method of manufacturing a compound semiconductor device includes: forming an initial layer over a substrate; forming a buffer layer over the...
US-9,502,524 Compound semiconductor device having gallium nitride gate structures
The present disclosure provides a semiconductor structure. The semiconductor structure includes a buffer layer on a substrate, an graded aluminum gallium...
US-9,502,523 Nanowire semiconductor device including lateral-etch barrier region
A semiconductor device includes a semiconductor-on-insulator wafer having a buried oxide layer. The buried oxide layer includes therein opposing etch barrier...
US-9,502,522 Mass production process of high voltage and high current Schottky diode with diffused design
A process of manufacture of high voltage (300-600V) and high current (10-100 A) Schottky diode, which includes the following steps in sequence: provide a N-type...
US-9,502,521 Multi-layer charge trap silicon nitride/oxynitride layer engineering with interface region control
A non-volatile memory semiconductor device comprising a semiconductor substrate having a channel and a gate stack above the channel. The gate stack comprises a...
US-9,502,520 Method for producing semiconductor device and semiconductor device
A method for producing a semiconductor device includes a first step of forming a fin-shaped semiconductor layer on a semiconductor substrate and forming a first...
US-9,502,519 Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first dielectric layer and a second...
US-9,502,518 Multi-channel gate-all-around FET
A high performance GAA FET is described in which vertically stacked silicon nanowires carry substantially the same drive current as the fin in a conventional...
US-9,502,517 Array substrate and fabrication method thereof, and display device
A display device, an array substrate and a fabrication method thereof are provided. The array substrate comprises a data line and a gate line, the data line and...
US-9,502,516 Recessed access devices and gate electrodes
Recessed access transistor devices used with semiconductor devices may include gate electrodes having materials with multiple work functions, materials that are...
US-9,502,515 Split gate flash memory structure with a damage free select gate and a method of making the split gate flash...
A method of manufacturing a split gate flash memory cell is provided. A select gate is formed on a semiconductor substrate. A sacrificial spacer is formed...
US-9,502,514 Memory devices and method of forming same
A device comprises a control gate structure over a substrate, a memory gate structure over the substrate, wherein a charge storage layer formed between the...
US-9,502,513 Non-volatile memory device and manufacture of the same
This disclosure discloses a non-volatile memory component and a manufacture method of the same. The non-volatile memory component includes a substrate, a first...
US-9,502,512 Trench power metal oxide semiconductor field effect transistor and edge terminal structure including an...
An edge terminal structure of a trench power semiconductor device includes a first conductive-type substrate, a first conductive-type epitaxial layer thereon, a...
US-9,502,511 Trench insulated gate bipolar transistor and edge terminal structure including an L-shaped electric plate...
An edge terminal structure of a power semiconductor device includes a second conductive-type substrate, a first conductive-type buffer layer, a first...
US-9,502,510 Heterojunction bipolar transistors for improved radio frequency (RF) performance
The present disclosure relates to heterojunction bipolar transistors for improved radio frequency (RF) performance. In this regard, a heterojunction bipolar...
US-9,502,509 Stress relieving semiconductor layer
A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing...
US-9,502,508 Method for manufacturing isolation structure integrated with semiconductor device
A method for manufacturing an isolation structure integrated with semiconductor device includes following steps. A substrate is provided. A plurality of...
US-9,502,507 Methods of forming strained channel regions on FinFET devices
One illustrative method disclosed herein includes, among other things, removing at least a portion of a vertical height of portions of an overall fin structure...
US-9,502,506 Structure for FinFET fins
A design structure for fins in a fin array that can be included in a fin field effect transistor (FinFET), the design structure including: a semiconductor fin...
US-9,502,505 Method and structure of making enhanced UTBB FDSOI devices
An integrated circuit die includes a substrate having a first layer of semiconductor material, a layer of dielectric material on the first layer of...
US-9,502,504 SOI lateral bipolar transistors having surrounding extrinsic base portions
Lateral SOI bipolar transistor structures are provided including an intrinsic base semiconductor material portion in which all surfaces of the intrinsic base...
US-9,502,503 Nanotube semiconductor devices
Semiconductor devices includes a thin epitaxial layer (nanotube) formed on sidewalls of mesas formed in a semiconductor layer. In one embodiment, a...
US-9,502,502 Semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are described. In an embodiment, a method of manufacturing a semiconductor device may include:...
US-9,502,501 Lateral field effect transistor device
A lateral field effect transistor device has a plurality of source and drain cells. Each source cell has a central semiconductor source region, and each drain...
US-9,502,500 Forming multi-stack nanowires using a common release material
A method for forming a multi-stack nanowire device includes forming a common release layer on a substrate, the common release layer comprising a common release...
US-9,502,499 Semiconductor device structure having multi-layered isolation trench structures
A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first trench between a first active region and a...
US-9,502,498 Power semiconductor device
A power semiconductor device may include a first conductivity type semiconductor substrate, a super-junction portion disposed on the first conductivity type...
US-9,502,497 Method for preparing power diode
A method for preparing a power diode, including: providing a substrate (10), growing a N type layer (20) on the front surface of the substrate (10); forming a...
US-9,502,496 Semiconductor device and method of manufacturing the same
A semiconductor device includes a vertical trench gate element portion and a lateral n-channel element portion for control which includes a well diffusion...
US-9,502,495 Semiconductor device and method of manufacturing the same
A semiconductor device according to the present invention includes a semiconductor layer provided with a gate trench, a first conductivity type source region...
US-9,502,494 Metal-insulator-metal (MIM) capacitor structure and method for forming the same
A metal-insulator-metal (MIM) capacitor structure and method for forming MIM capacitor structure are provided. The MIM capacitor structure includes a substrate...
US-9,502,493 Multi-step method of forming a metal film
The present disclosure relates to an integrated chip having a titanium nitride film that provides for a reduced leakage path, and an associated method of...
US-9,502,492 Semiconductor device, method of manufacturing the same, display unit, and electronic apparatus
A semiconductor device includes: a capacitor including a first insulating film between a lower electrode and an upper electrode; and a first laminated structure...
US-9,502,491 Embedded sheet capacitor
A multilayer capacitor is provided that includes a plurality of vias configured to receive interconnects from a die.
US-9,502,490 Embedded package substrate capacitor
A package substrate is provided that includes a core substrate and a capacitor embedded in the core substrate including a first side. The capacitor includes a...
US-9,502,489 Method of manufacturing semiconductor device
Provided is a semiconductor device having improved reliability. Over a semiconductor substrate, a first coil is formed via a first insulating film. A second...
US-9,502,488 Organic light emitting diode display device and manufacturing method thereof
An organic light emitting display device according to the present disclosure includes: a semiconductor on a substrate including a switching channel of a...
US-9,502,487 Organic electroluminescent device and repairing method thereof
An organic electroluminescent device includes a substrate including a plurality of pixel regions each having a light emission region and an element region; a...
US-9,502,486 Organic light-emitting diode (OLED) display and method for manufacturing the same
An organic light-emitting diode (OLED) display having thin film transistors (TFTs) is disclosed. In one aspect, TFTs of the OLED display include a substrate and...
US-9,502,485 Organic light-emitting diode display having light-blocking portions of black matrix with differing light...
Organic light-emitting diode (OLED) displays and methods of manufacturing OLD displays are disclosed. In one aspect, an OLED display includes a substrate having...
US-9,502,484 Thin-film transistor substrate, related light-emitting apparatus, and related manufacturing method
A thin-film transistor substrate may include an electrical wiring structure that includes a first electrode, which may be a source electrode, a drain electrode,...
US-9,502,483 Light-emitting device
There is provided an EL light-emitting device with less uneven brightness. When a drain current of a plurality of current controlling TFTs is Id, a mobility is...
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