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Patent # Description
US-9,508,832 Method of fabricating a semiconductor device
A method of fabricating a semiconductor device includes forming a channel layer on a substrate, forming a sacrificial layer on the channel layer, forming a...
US-9,508,831 Method for fabricating vertically stacked nanowires for semiconductor applications
Embodiments of the present disclosure provide methods for forming nanowire structures with desired materials for three dimensional (3D) stacking of fin field...
US-9,508,830 Method of forming FinFET
A method of forming a FinFET is provided. A gate oxide layer and a dummy poly layer are substantially simultaneously etched using an etchant having a higher...
US-9,508,829 Nanosheet MOSFET with full-height air-gap spacer
A semiconductor device includes a gate positioned on a substrate; a nanosheet that extends through the gate, protrudes from a sidewall of the gate, and forms a...
US-9,508,828 Array substrate and method of fabricating the same
A method of fabricating an array substrate includes forming a first metal layer, a gate insulating material layer and an oxide semiconductor material layer on a...
US-9,508,827 Method for fabricating semiconductor device
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a gate structure on the substrate;...
US-9,508,826 Replacement gate structure for enhancing conductivity
After formation of a gate cavity straddling at least one semiconductor material portion, a gate dielectric layer and at least one work function material layer...
US-9,508,825 Method and structure for forming gate contact above active area with trench silicide
A semiconductor device includes a substrate including an active area; a gate formed on the active area and surrounded by a spacer along a sidewall; a first...
US-9,508,824 Method for fabricating a bipolar transistor having self-aligned emitter contact
A method of producing a semiconductor device, comprising a substrate layer made of a semiconductor material of a first conductivity type and having a first...
US-9,508,823 Chemical sensor with multiple sensor cells
In a method for manufacturing a chemical sensor with multiple sensor cells, a substrate is provided and an expansion inhibitor is applied to the substrate for...
US-9,508,822 Semiconductor device
A semiconductor device comprises: a gate insulating film 190 stacked on a semiconductor layer 130; and a gate electrode layer 230 stacked on the gate insulating...
US-9,508,821 Self-aligned contacts
A transistor comprises a substrate, a pair of spacers on the substrate, a gate dielectric layer on the substrate and between the pair of spacers, a gate...
US-9,508,820 Semiconductor devices and methods of manufacturing the same
A semiconductor device includes a gate insulation layer pattern, a lower gate electrode, an upper gate electrode, and a first inner spacer. The gate insulation...
US-9,508,819 Semiconductor device for compensating internal delay, methods thereof, and data processing system having the same
A method of manufacturing a field effect transistor using a gate last process includes providing the field effect transistor which includes a high-k dielectric...
US-9,508,818 Method and structure for forming gate contact above active area with trench silicide
A semiconductor device includes a substrate including an active area; a gate formed on the active area and surrounded by a spacer along a sidewall; a first...
US-9,508,817 Semiconductor device and manufacturing method thereof
A semiconductor structure, a semiconductor device, and a method for forming the semiconductor device are provided. In various embodiments, the method for...
US-9,508,816 Low resistance replacement metal gate structure
A first sacrificial gate structure of a first width and a second sacrificial gate structure of a second width greater than the first width are provided on a...
US-9,508,815 Semiconductor device and method for manufacturing thereof
A semiconductor device is provided including a substrate and a plurality of gate stacks. The gate stack includes a dielectric layer disposed on the substrate, a...
US-9,508,814 Integrated circuit having a contact etch stop layer
An integrated circuit structure includes a gate stack over a substrate. The integrated circuit structure also includes a gate spacer over a sidewall of the gate...
US-9,508,813 High-side field effect transistor
The present invention provides a transistor comprising a substrate having a surface; a first deep well region in the substrate; a second deep well region in the...
US-9,508,812 Semiconductor device
A semiconductor device is provided that comprises a semiconductor substrate comprising an active area and a peripheral region adjacent the active area and...
US-9,508,811 Semi-floating-gate device and its manufacturing method
The disclosure, belonging to the technological field of semiconductor memory, specifically relates to a semi-floating-gate device which comprises at least a...
US-9,508,810 FET with air gap spacer for improved overlap capacitance
A semiconductor device and method of forming a semiconductor device including a semiconductor substrate, a gate stack extending from the semiconductor...
US-9,508,809 III-N device with extended source and drain
A semiconductor device includes a substrate, a semiconductor layer having a buffer layer, a spacer layer, and barrier layer sequentially stacked on the...
US-9,508,808 Manufacturing method of thin film transistor and manufacturing method of array substrate
A thin film transistor and manufacturing method thereof, an array substrate comprising the thin film transistor and manufacturing method thereof are provided....
US-9,508,807 Method of forming high electron mobility transistor
A method of forming a high electron mobility transistor (HEMT) includes epitaxially growing a second III-V compound layer on a first III-V compound layer. The...
US-9,508,806 Electronic device, image display device and sensor, and method for manufacturing electronic device
An electronic device includes a control electrode 11 formed on a substrate 10, an insulating layer 12 covering the control electrode 11, an active layer 13...
US-9,508,805 Termination design for nanotube MOSFET
A termination structure for a semiconductor power device includes a plurality of termination groups formed in a lightly doped epitaxial layer of a first...
US-9,508,804 Nitride semiconductor element and nitride semiconductor wafer
According to one embodiment, a nitride semiconductor element includes a foundation layer, a functional layer and a stacked body. The stacked body is provided...
US-9,508,803 Semiconductor device and method for producing semiconductor device
[Problem] To provide a semiconductor device in which the surface of a metal electrode arranged on the outermost surface can be made flat or smooth, and a method...
US-9,508,802 Gettering process for producing semiconductor device
A process for producing a semiconductor device includes: forming an SiC epitaxial layer on an SiC substrate; implanting the epitaxial layer with ions; forming a...
US-9,508,801 Stacked graphene field-effect transistor
In an aspect of the present invention, a graphene field-effect transistor (GFET) structure is formed. The GFET structure comprises a wider portion and a narrow...
US-9,508,800 Advanced transistors with punch through suppression
An advanced transistor with punch through suppression includes a gate with length Lg, a well doped to have a first concentration of a dopant, and a screening...
US-9,508,799 Substrate of semiconductor device including epitaxial layer and silicon layer having same crystalline orientation
A method for fabricating substrate of a semiconductor device is disclosed. The method includes the steps of: providing a first silicon layer; forming a...
US-9,508,798 Semiconductor device
According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of the...
US-9,508,797 Gallium nitride power devices using island topography
A semiconductor device in provided having a substrate and a semiconductor layer formed on a main surface of the substrate. A plurality of first island...
US-9,508,796 Internal spacers for nanowire transistors and method of fabrication thereof
A nanowire transistor of the present description may be produced with internal spacers formed by using sacrificial spacers during the fabrication thereof. Once...
US-9,508,795 Methods of fabricating nanowire structures
Methods are presented for fabricating nanowire structures, such as one or more nanowire field effect transistors. The methods include, for instance: providing a...
US-9,508,794 Mixed N/P-type fin semiconductor structure with epitaxial materials having increased surface area through...
A non-planar semiconductor structure includes mixed n-and-p type raised semiconductor structures, e.g., fins, having epitaxial structures grown on top surfaces...
US-9,508,793 Semiconductor device and method of operating the same and structure for suppressing current leakage
A structure for suppressing current leakage and a semiconductor device including the same are provided. The structure for suppressing current leakage includes a...
US-9,508,792 Semiconductor device including an electric field buffer layer and method for manufacturing same
An electric field buffer layer is formed so as to surround an active region. The electric field buffer layer includes a plurality of P-type impurity layers....
US-9,508,791 Semiconductor device having a metal gate
A semiconductor device comprises a non-conductive gate feature over a substrate, and a metal gate electrode over the substrate. The metal gate electrode...
US-9,508,790 Trench capacitors and methods of forming the same
A method of forming a semiconductor device includes forming an opening having a sidewall in a substrate and forming a first epitaxial layer in the opening. The...
US-9,508,789 Electronic components on trenched substrates and method of forming same
An electronic module includes a substrate including at least one structure that reduces stress flow through the substrate, wherein the structure includes at...
US-9,508,788 Capacitors in integrated circuits and methods of fabrication thereof
In one embodiment, a capacitor includes a first row including a first capacitor element and a second capacitor element coupled in parallel, and a second row...
US-9,508,787 Semiconductor device
Two rows of resistive bodies, first resistive body and second resistive body, having slits are provided on an input matching circuit substrate. Since a...
US-9,508,786 Integrated circuits and fabrication methods thereof
A method of fabricating an integrated circuit is also provided. The method includes forming a first polysilicon region having an initial grain size on a...
US-9,508,785 Semiconductor device including a resistor metallic layer and method of forming the same
A semiconductor device including a resistor metallic layer and method forming the same. In one embodiment, the semiconductor device includes a source region and...
US-9,508,784 Organic electro-luminescent display device
An organic EL display device includes an inorganic insulating film including a contact part as an opening where a contact electrode made of a conductive film is...
US-9,508,783 Display panel and fabrication method thereof
A display panel and fabrication method is provided. The display panel may include a substrate, and the substrate includes a display region and a border region...
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