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Semiconductor device including leadframe with a combination of leads and
lands and method
In one embodiment, a semiconductor device includes a die pad defining multiple peripheral edge segments. In addition, the semiconductor device includes a...
Semiconductor device and a method of manufacturing the same
A technique which improves the reliability in coupling between a bump electrode of a semiconductor chip and wiring of a mounting substrate, more particularly a...
Memory module in a package
A microelectronic package can include a substrate having first and second opposed surfaces, at least two pairs of microelectronic elements, and a plurality of...
Semiconductor substrates with unitary vias and via terminals, and
associated systems and methods
Semiconductor substrates with unitary vias and via terminals, and associated systems and methods are disclosed. A representative method in accordance with a...
Electronic device and method of manufacturing the same
In manufacturing an electronic device in which a semiconductor chip including an element layer formed on a front surface of a substrate and a heat sink to...
Semiconductor device and method of forming openings in
thermally-conductive frame of FO-WLCSP to dissipate heat...
A semiconductor device has a thermally-conductive frame and interconnect structure formed over the frame. The interconnect structure has an electrical...
Semiconductor die package with multiple mounting configurations
A semiconductor die package includes first, second and third metal blocks insulated from one another. The first metal block has a thinner inner section, a first...
Semiconductor package and method of manufacturing the same
There are provided a semiconductor package and a method of manufacturing the same. The semiconductor package includes: a substrate having a ground electrode...
Semiconductor packages and methods of packaging semiconductor devices
Semiconductor packages and methods for forming a semiconductor package are disclosed. The method includes providing a wafer having first and second major...
Method for protecting copper wire bonds on aluminum pads of a
semiconductor device from corrosion
A semiconductor device and method for encapsulating the semiconductor device are provided. The method includes: forming a plurality of wire bonds on a surface...
Semiconductor device and method of forming compliant stress relief buffer
around large array WLCSP
A semiconductor device has a stress relief buffer mounted to a temporary substrate in locations designated for bump formation. The stress relief buffer can be a...
Semiconductor device and manufacturing method thereof
It is an object of the present invention to provide a peeling method that causes no damage to a layer to be peeled and to allow not only a layer to be peeled...
Semiconductor device and method for manufacturing the same
A separation layer and a semiconductor element layer including a thin film transistor are formed. A conductive resin electrically connected to the semiconductor...
Staggered electrical frame structures for frame area reduction
A method of forming a group of probe pads or sets of probe pads and DUTs in a staggered pattern within a portion of a pad row and the resulting device are...
Test chip, test board and reliability testing method
A test board includes a first chip mounting area, a first input area, a second input area, a first output area, and a second output area. The test board also...
Method for lower thermal budget multiple cures in semiconductor packaging
A method for forming a multilayer structure comprises the steps of: depositing a first polymerizable layer on a substrate; applying microwave energy to the...
Clock tree synthesis for low cost pre-bond testing of 3D integrated
To enable low cost pre-bond testing for a three-dimensional (3D) integrated circuit, a backbone die may have a fully connected two-dimensional (2D) clock tree...
Alignment of three dimensional integrated circuit components
A method for aligning a chip onto a substrate is disclosed. The method includes, depositing a ferrofluid, onto a substrate that has one or more pads that...
Method for testing susceptor of chemical vapor deposition apparatus and
method for manufacturing organic light...
A method for testing a susceptor of a chemical vapor deposition (CVD) apparatus includes preparing a substrate including a transparent conductive layer,...
Method to detect wafer arcing in semiconductor manufacturing equipment
Methods and systems for accurate arc detection in semiconductor manufacturing tools are disclosed. Such methods and systems provide real-time arc detection and...
Semiconductor inspection method, semiconductor inspection device and
manufacturing method of semiconductor element
In a semiconductor inspection method using a semiconductor inspection device, by selecting an incident energy and a negative potential and scanning an...
Inline measurement of molding material thickness using terahertz
A method including emitting a terahertz beam from a light source at a layer of molding material; detecting a reflectance of the beam; and determining a...
Fin field effect transistor and method for forming the same
Various embodiments provide FinFETs and methods for forming the same. In an exemplary method, a semiconductor substrate having sacrificial layers formed thereon...
Monitoring laser processing of semiconductors by raman spectroscopy
A Raman probe is used to detect crystal structure of a substrate undergoing thermal processing in a thermal processing system. The Raman probe may be coupled to...
Thermal management of tightly integrated semiconductor device, system
Some implementations provide a package that includes a first die and a second die adjacent to the first die. The second die is capable of heating the first die....
Tunneling field effect transistor device and related manufacturing method
A transistor device may include a first source portion including a first InSb material set and a first first-type dopant set. The transistor device may include...
Dummy gate for a high voltage transistor device
The present disclosure provides a semiconductor device. The semiconductor device includes a first doped region and a second doped region both formed in a...
Methods of forming punch through stop regions on FinFET devices on
CMOS-based IC products using doped spacers
One illustrative method disclosed herein includes, among other things, forming a first plurality of fins for a type 1 device and a second plurality of fins for...
Formation of nickel silicon and nickel germanium structure at staggered
A method includes providing a first source/drain contact, providing a second source/drain contact, and surrounding the first and second source/drain contacts...
Temperature-controlled implanting of a diffusion-suppressing dopant in a
Semiconductor structures and methods of fabrication are provided for, for instance, inhibiting diffusion of active dopant within a semiconductor material. A...
Method to form silicide and contact at embedded epitaxial facet
An integrated circuit with an MOS transistor abutting field oxide and a gate structure on the field oxide adjacent to the MOS transistor and a gap between an...
Methods for contact formation for 10 nanometers and beyond with minimal
A method of making a semiconductor device includes depositing a hard mask on a dielectric layer on a substrate, the dielectric layer being disposed around...
Methods of making a monolithic microwave integrated circuit
Low Q associated with passive components of monolithic integrated circuits (ICs) when operated at microwave frequencies can be avoided or mitigated using high...
Semiconductor device and manufacturing method of the same
To enhance reliability and performance of a semiconductor device that has a fully-depleted SOI transistor, while a width of an offset spacer formed on side...
3D fin tunneling field effect transistor
A method for forming a tunneling field effect transistor includes forming gate structures over a semiconductor fin on a substrate having at least two pitches...
Processes used in fabricating a metal-insulator-semiconductor field effect
During fabrication, a second oxide layer is disposed over a first region and a second region of a structure. The second region includes a first oxide layer...
Method of tip shape of cutting member, semiconductor chip manufacturing
method, circuit board, and electronic...
A design method includes a process of preparing plural cutting members having different degrees of taper in a tip portion thereof, a process of preparing plural...
Fabricating pillar solder bump
A substrate bonding method is able to reliably bond substrates while avoiding a reduction in yield made worse by finer pitches. The substrate bonding method can...
Method of depositing a diffusion barrier for copper interconnect
The present invention pertains to methods for forming a metal diffusion barrier on an integrated circuit wherein the formation includes at least two operations....
Semiconductor device and manufacturing method thereof
To improve the reliability of a semiconductor device including a low-resistance material such as copper, aluminum, gold, or silver as a wiring. Provided is a...
Stair step formation using at least two masks
Apparatuses and methods for stair step formation using at least two masks, such as in a memory device, are provided. One example method can include forming a...
Methods and apparatus of metal gate transistors
In some embodiments, a method of manufacturing a device includes providing a first device with an isolation area, an active area next to the isolation area, a...
Conductive layer routing
Methods of fabricating middle of line (MOL) layers and devices including MOL layers. A method in accordance with an aspect of the present disclosure includes...
Methods for fabricating integrated circuits with isolation regions having
uniform step heights
Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a semiconductor...
Formation of isolation surrounding well implantation
Embodiments of present invention provide a method of making well isolations. The method includes forming a hard-mask layer on top of said substrate; forming a...
A method includes receiving a wafer stack having at least two wafers bonded together. At least one blade is inserted between a first wafer of the at least two...
Apparatus of separating flexible substrate from glass substrate and
manufacturing equipment thereof
An apparatus of separating a flexible substrate from a glass substrate comprises a cylinder-shaped roller; and a control unit connected to the roller configured...
In-situ removable electrostatic chuck
Embodiments described herein generally relate to an electrostatic chuck (ESC). The ESC may contain a first plurality of electrodes adapted to electrostatically...
Article transport carriage
An article transport carriage includes a carriage main body configured to travel along a travel path, a support portion configured to support a bottom surface...
Parallel single substrate marangoni module
A substrate drying apparatus for drying a width of a surface of a substrate in a liquid. The substrate drying apparatus has a liquid tank containing the liquid....