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Patent # Description
US-9,507,678 Non-disruptive controller replacement in a cross-cluster redundancy configuration
During a storage redundancy giveback from a first node to a second node following a storage redundancy takeover from the second node by the first node, the...
US-9,507,677 Storage control device, storage apparatus, and computer-readable recording medium having storage control...
Each CM includes an interface unit, a first detection unit, and a reset control unit. The interface unit is configured to be connected to a communication...
US-9,507,676 Cluster creation and management for workload recovery
Aspects of the disclosure relate to managing migration of one or more applications from a primary computing device to recovery computing devices using a...
US-9,507,675 Systems and methods for recovering from uncorrected DRAM bit errors
Systems, methods, and computer programs are disclosed for recovering from dynamic random access memory (DRAM) defects. One method comprises determining that an...
US-9,507,674 Methods for preserving state across a failure and devices thereof
A method, non-transitory computer readable medium, and host device that receives one or more transactions. A state is stored in a transaction log in a volatile...
US-9,507,673 Method and system for performing an incremental restore from block-based backup
Techniques for performing an incremental restore from block-based backup are described herein. One method starts by parsing entries in first block allocation...
US-9,507,672 Method, apparatus, and system for generating and recovering memory snapshot of virtual machine
A method for generating and recovering a memory snapshot of a virtual machine is provided. The method includes: obtaining a current S.sup.th memory page of the...
US-9,507,671 Write cache protection in a purpose built backup appliance
For write cache protection of purpose built backup appliances in a computing environment, backup data of the write cache is created using a server memory that...
US-9,507,670 Selective processing of file system objects for image level backups
Systems, methods, and computer program products are provided for reducing the size of image level backups. An example method receives backup parameters...
US-9,507,669 Method of transmitting data using HARQ
A method of data transmission using HARQ is provided. The method includes transmitting an uplink data, receiving an ACK/NACK signal for the uplink data, keeping...
US-9,507,668 System and method for implementing a block-based backup restart
A system and method for block-based restarts are described. A data storage system interfaces with one or more nodes of a network file system on which a volume...
US-9,507,667 Computer methods and computer systems for automatic data analysis, reconcilliation and repair
In some embodiments, the instant invention includes a computer-implemented method that includes: specifically programming at least one computer system to...
US-9,507,666 Memory chips and data protection methods
A memory chip coupled to a host includes a memory and a controller. Multiple boot images having the same content are pre-loaded in the memory. The controller is...
US-9,507,665 Computing device and method for accessing BIOS using middleware controller of the computing device
A computing device includes a first BIOS chip and a second BIOS chip. Each of the first and second BIOS chips store a BIOS image and comprises a plurality of...
US-9,507,664 Storage system including a plurality of storage units, a management device, and an information processing...
A first processor is configured to receive allocation of storage devices and configure a group by involving the allocated storage devices. Each of the allocated...
US-9,507,663 Memory device and operation method
A memory device and an operation method thereof are provided, and the operation method of the memory device includes following steps. A programming operation is...
US-9,507,662 Expanded error correction codes
In some examples, a memory device may be configured to store data in either an original or an inverted state based at least in part on whether the majority of...
US-9,507,661 Bus system having a master and a group of slaves and communication method for interchanging data in said bus system
The invention relates to a bus system having a master and a group of slaves connected thereto via a bus and to a communication method for interchanging data...
US-9,507,660 Eliminate corrupted portions of cache during runtime
In an approach for taking corrupt portions of cache offline during runtime, a notification of a section of a cache to be taken offline is received, wherein the...
US-9,507,659 Temporary pipeline marking for processor error workarounds
Embodiments include a method for temporary pipeline marking for processor error workarounds. The method includes monitoring a pipeline of a processor for an...
US-9,507,658 Data reading method, memory storage device and memory controlling circuit unit
A data reading method, a memory storage device and a memory controlling circuit unit are provided. The method includes: receiving a first read command; setting...
US-9,507,657 Investigation program, information processing apparatus, and information processing method
A non-transitory computer readable storage medium that stores therein an investigation program for causing an information processing apparatus to execute...
US-9,507,656 Mechanism for handling unfused multiply-accumulate accrued exception bits in a processor
A mechanism for handling unfused multiply-add accrued exception bits includes a processor including a floating point unit, a storage, and exception logic. The...
US-9,507,655 Tracking asynchronous entry points for an application
Asynchronous operations associated with a request such as synchronous threads, runnable elements, callable elements, and other invokable objects are tracked to...
US-9,507,654 Data processing system having messaging
A processing system includes a first processing system element, and a second processing system element configured to communicate with the first processing...
US-9,507,653 Inter-process communication channel
Techniques are described herein that are capable of constructing an inter-process communication channel, for example, between a requesting component and a...
US-9,507,652 Synchronizing communication over shared memory
Two threads may communicate via shared memory using two different modes. In a polling mode, a receiving thread may poll an indicator set by the sending thread...
US-9,507,651 Techniques to modify a document using a latent transfer surface
Techniques include modifying a document using a latent transfer surface. An apparatus may comprise a document editing subsystem comprising a transfer surface...
US-9,507,650 Power efficient callback patterns
In one or more embodiments, an application program interface (API) is provided and enables an entity, such as an application, script, or other computing object...
US-9,507,649 Web browser for spoofing supported features
Emulating a supported web browser feature when a webpage is merely testing for web browser support of various features. Frequently a web page may test for...
US-9,507,648 Separate plug-in processes in browsers and applications thereof
Embodiments of the present invention relate to browser plug-ins. In one embodiment, a system browses web content using a plug-in. The system includes at least...
US-9,507,647 Cache as point of coherence in multiprocessor system
In a multiprocessor system, a conflict checking mechanism is implemented in the L2 cache memory. Different versions of speculative writes are maintained in...
US-9,507,646 Cycle-level thread alignment on multi-threaded processors
A time-of-day (TOD) clock is leveraged to provide a high-resolution measure of the real time that is suitable for the indication of date and time to perform...
US-9,507,645 Thread processing method for using a multi-core processor and systems therefor
A thread processing method that is executed by a multi-core processor, includes supplying a command to execute a first thread to a first processor; judging a...
US-9,507,644 Task scheduling based on thermal conditions of locations of processors
Provided is a computer system including a first processor disposed in a first zone, a second processor disposed in a second zone, a prioritizing unit, and a...
US-9,507,643 Techniques for virtualization of application delivery controllers
A virtualized application delivery controller (ADC) device operable in a communication network comprises a hardware infrastructure including at least a memory,...
US-9,507,642 Method and systems for sub-allocating computational resources
The disclosed embodiments relate to systems and methods for method and systems for sub-allocating computational resources. A first computing device receives...
US-9,507,641 System and method for dynamic granularity control of parallelized work in a portable computing device (PCD)
Systems and methods for dynamic granularity control of parallelized work in a heterogeneous multi-processor portable computing device (PCD) are provided. During...
US-9,507,640 Multicore processor and method of use that configures core functions based on executing instructions
A multiprocessor system having plural heterogeneous processing units schedules instruction sets for execution on a selected of the processing units by matching...
US-9,507,639 Parallel computation with multiple storage devices
A method and system are disclosed for allowing access to processing resources of one or more idle memory devices to an active memory device is disclosed, where...
US-9,507,638 Compute work distribution reference counters
One embodiment of the present invention sets forth a technique for managing the allocation and release of resources during multi-threaded program execution....
US-9,507,637 Computer platform where tasks can optionally share per task resources
Disclosed are apparatus and methods for managing thread resources. A computing device can generate threads for an executable application. The computing device...
US-9,507,636 Resource management and allocation using history information stored in application's commit signature log
Aspects of the present disclosure are directed towards managing computing resources. Managing computing resources can include initializing in a computer system,...
US-9,507,635 Assigning speculative processes to plurality of CPUs based on calculated maximum number of speculative...
A scheduling method is executed by a given CPU among multiple CPUs. The scheduling method includes subtracting for each of the CPUs, a number of processes...
US-9,507,634 Methods and system for distributing technical computing tasks to technical computing workers
A method and system is disclosed for providing a distributed technical computing environment for distributing technical computing tasks from a technical...
US-9,507,633 Scheduling method and system
A scheduling method that is executed by a first central processing unit (CPU) includes determining whether a task belongs to a first task category; determining...
US-9,507,632 Preemptive context switching of processes on ac accelerated processing device (APD) based on time quanta
Methods, systems, and computer readable media for preemptive context-switching of processes on an accelerated processing device are based upon a comparison of...
US-9,507,631 Migrating a running, preempted workload in a grid computing system
A preempt of a live migratable workload, or job, in a distributed computing environment is performed, allowing it to release its resources for use by a higher...
US-9,507,630 Application context transfer for distributed computing resources
In one embodiment, a universal programming module on a first device collects context and state information from a local application executing on the first...
US-9,507,629 Network architecture and protocol for cluster of lithography machines
A lithography system having one or more lithography elements Each lithography element has a plurality of lithography subsystems. The lithography system further...
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