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Patent # Description
US-9,515,078 Semiconductor structure and method for forming the same
Various embodiments provide semiconductor structures and methods for forming the same. In an exemplary method, a semiconductor substrate is provided. A first...
US-9,515,077 Layout of static random access memory cell
A static random access memory (SRAM) cell is defined by first and second boundaries disposed opposite to each other and third and fourth boundaries disposed...
US-9,515,076 Semiconductor integrated circuit device
In an image information chip or the like, a multi-port SRAM is embedded with a logic circuit. When the 3 port is used, the 1 port may serve as a differential...
US-9,515,075 Method for fabricating ferroelectric random-access memory on pre-patterned bottom electrode and oxidation barrier
Structure and method of fabrication of F-RAM cells are described. The F-RAM cell include ferroelectric capacitors forming over and with a pre-patterned barrier...
US-9,515,074 3-D non-volatile memory device and method of manufacturing the same
A three-dimensional (3-D) non-volatile memory device includes a plurality of word line structures extended in parallel and including a plurality of interlayer...
US-9,515,073 III-V semiconductor CMOS FinFET device
A method for forming a semiconductor device comprises forming an insulator layer on a semiconductor substrate, removing portions of the insulator layer to form...
US-9,515,072 FinFET structure and method for manufacturing thereof
Present disclosure provides a FinFET structure, including a plurality of fins, a gate, and a first dopant layer. The gate is disposed substantially orthogonal...
US-9,515,071 Asymmetric source/drain depths
A semiconductor device includes a substrate having a first region and a second region, an n-type transistor in the first region, the n-type transistor...
US-9,515,070 Replacement metal gate
A semiconductor structure which includes: a fin on a semiconductor substrate; and a gate structure wrapped around the fin. The gate structure includes: spaced...
US-9,515,069 Semiconductor die
A semiconductor die includes a substrate and an insulation layer over the substrate. The semiconductor die also includes a plurality of P-metal gate areas...
US-9,515,068 Monolithic integration of GaN and InP components
A compound semiconductor integrated circuit comprising a first substrate; a first electronic component formed on top of said first substrate; a layer of a first...
US-9,515,067 Semiconductor device having switching element and free wheel diode and method for controlling the same
A semiconductor device includes a switching element having: a drift layer; a base region; an element-side first impurity region in the base region; an...
US-9,515,066 Semiconductor device having an insulated gate bipolar transistor arrangement and a method for forming such a...
A semiconductor device includes an insulated gate bipolar transistor (IGBT) arrangement. The IGBT arrangement includes a carrier confinement reduction region...
US-9,515,065 Driver circuit, method of manufacturing the driver circuit, and display device including the driver circuit
Provided are a driver circuit which suppresses damage of a semiconductor element due to ESD in a manufacturing process, a method of manufacturing the driver...
US-9,515,064 Static electricity protection circuit, electro-optic device and electronic device
In a static electricity protection circuit according to the invention, a first wiring is electrically connected to a drain of a first p-type transistor and a...
US-9,515,063 Compound semiconductor device and manufacturing method of the same
An electrode (109) insulated from a compound semiconductor layer (102) and being in contact with an electrode (101) and a compound semiconductor layer (103) is...
US-9,515,062 Electronic devices and methods having a compact multi-way transformer combiner
Apparatus having structures implementing compact and symmetric multi-way transformer combiners are described herein. In an embodiment, each unit device cell of...
US-9,515,061 Semiconductor module and semiconductor device
A semiconductor module includes first and second semiconductor elements connected in series, an insulating substrate, first and second metal patterns formed on...
US-9,515,060 Multi-chip semiconductor power device
A semiconductor device includes a first semiconductor power chip mounted over a first carrier and a second semiconductor power chip mounted over a second...
US-9,515,059 Proximity sensor having light-blocking structure in leadframe and method of making same
A method for fabricating a semiconductor proximity sensor includes providing a flat leadframe with a first and a second surface. The second surface is...
US-9,515,058 Light emitting device package and light unit including the same
Disclosed are a light emitting device package. The light emitting device package includes a body having recess; a first lead frame including a first and second...
US-9,515,057 Semiconductor package and method of manufacturing the semiconductor package
A semiconductor package includes: a package base substrate; at least one first semiconductor chip disposed on the package base substrate; a first molding member...
US-9,515,056 Solid state lighting device including narrow spectrum emitter
A multi-emitter solid state lighting device includes at least one narrow spectral output solid state light emitter, such as may be in the green range, having a...
US-9,515,055 Light emitting devices including multiple anodes and cathodes
Solid state (e.g., LED) lighting devices include multiple emitters mounted on or over a substrate comprising insulating material with conductive traces thereon,...
US-9,515,054 Semiconductor device and stacked semiconductor package having the same
A semiconductor device includes a plurality of semiconductor chips connected through a scribe lane; a plurality of through electrodes formed in each of the...
US-9,515,053 Microelectronic packaging without wirebonds to package substrate having terminals with signal assignments that...
A microelectronic assembly can include a circuit panel having first and second panel contacts at respective first and second surfaces thereof, and first and...
US-9,515,052 Semiconductor package including a step type substrate
Disclosed herein are semiconductor packages. A semiconductor package may include a substrate configured to include a first face and a second face opposite the...
US-9,515,051 Metal to metal bonding for stacked (3D) integrated circuits
The present invention provides a stabilized fine textured metal microstructure that constitutes a durable activated surface usable for bonding a 3D stacked...
US-9,515,050 Electronic apparatus having a resin filled through electrode configured to go through first and second...
A first semiconductor component and a second semiconductor component are attached together via an adhesion layer so that the first semiconductor component and...
US-9,515,049 Flexibly-wrapped integrated circuit die
Embodiments of a flexibly-wrapped integrated circuit die device and a method for mounting a flexibly-wrapped integrated circuit die to a substrate are...
US-9,515,048 Method for fabricating an interposer
A method for fabricating an interposer is provided, which includes the steps of: providing a substrate body having a chip mounting side and an opposite external...
US-9,515,047 High performance package and process for making
A method for manufacturing circuit component package is disclosed. The method first forms copper circuits on a single-sided printed circuit board, and prints an...
US-9,515,046 Stacked microfeature devices and associated methods
Stacked microfeature devices and associated methods of manufacture are disclosed. A package in accordance with one embodiment includes first and second...
US-9,515,045 Method and apparatus for inspecting a semiconductor chip prior to bonding
A chip handling apparatus, unit and method is presented. The chip handling apparatus comprises a chip supply station; a chip mounting station; and one or more...
US-9,515,044 Electronic device, method of manufacturing the same, metal particle, and electroconductive paste
Provided is an electronic device which includes a conductor allowing an electric signal to transmit therethrough, the conductor containing a plurality of...
US-9,515,043 Semiconductor device including a buffer layer structure for reducing stress
A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different...
US-9,515,042 Anisotropic conductive film, connection structure and method of producing the same
An anisotropic conductive film is obtained by dispersing conductive particles in an insulating adhesive composition including a (meth)acrylate-based monomer...
US-9,515,041 Method for bonding a chip to a substrate
A method is provided for bonding a chip to a substrate, the method comprising the steps of providing a chip, providing a substrate, providing a recess in one of...
US-9,515,040 Package structure and fabrication method thereof
A method for fabricating a package structure is provided, including the steps of: sequentially forming a metal layer and a dielectric layer on a first carrier,...
US-9,515,039 Substrate structure with first and second conductive bumps having different widths
A substrate structure is provided, which includes a substrate body having a plurality of conductive pads, and a plurality of first conductive bumps and a...
US-9,515,038 Electrical connection for chip scale packaging
A system and method for providing a post-passivation and underbump metallization is provided. An embodiment comprises a post-passivation layer that is larger...
US-9,515,037 Semiconductor device having through silicon vias and manufacturing method thereof
In The semiconductor device, a semiconductor substrate has first and second surfaces. A circuitry layer is formed over the first surface and a first insulating...
US-9,515,036 Methods and apparatus for solder connections
Methods and apparatus for solder connections. An apparatus includes a substrate having a conductive terminal on a surface; a passivation layer overlying the...
US-9,515,035 Three-dimensional integrated circuit integration
Wiring structures, methods for providing a wiring structure, and methods for distributing currents with a wiring structure from one or more through-substrate...
US-9,515,034 Bond pad having a trench and method for forming
A conductive structure is formed in a last metal layer of an integrated circuit. Passivation material is patterned over a portion of the conductive structure. A...
US-9,515,033 Monolithic microwave integrated circuit
A monolithic microwave integrated circuit included a substrate, a first pad, a first line, a second line, a second pad, a third pad, a first active element, a...
US-9,515,032 High-frequency package
A high-frequency package comprises a ground lead, connected to a die, occupying a side of the high-frequency package, wherein a slot is formed within the ground...
US-9,515,031 Mitigation of far-end crosstalk induced by routing and out-of-plane interconnects
In accordance with one aspect of the present description, a transmission line such as a microstrip or stripline transmission line, has stub-shaped projections...
US-9,515,030 X-ray obscuration film and related techniques
An X-ray obscuration (XRO) film comprising one or more metallic wire mesh layers and an adjacent layer of indium foil having portions which extend into openings...
US-9,515,029 Radio frequency module including segmented conductive top layer
A radio frequency (RF) module comprises a conductive top layer configured to improve RF interference-shielding functionality with respect to one or more RF...
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