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Patent # Description
US-9,514,978 Method of forming semiconductor device having a conductive via structure
A method for fabricating a semiconductor device includes forming a first photo-sensitive layer over a contact pad, wherein the contact pad is on a substrate....
US-9,514,977 Semiconductor device and manufacturing method thereof
A semiconductor device according to the present embodiment includes a first wiring part located above a substrate and made of a first metal material. A second...
US-9,514,976 Trench isolation implantation
Embodiments of the disclosure include a shallow trench isolation structure having a dielectric material with energetic species implanted to a predetermined...
US-9,514,975 Semiconductor with through-substrate interconnect
Semiconductor devices are described that have a metal interconnect extending vertically through a portion of the device to the back side of a semiconductor...
US-9,514,974 Process apparatus with on-the-fly substrate centering
A substrate processing apparatus including a frame defining a chamber with a substrate transport opening and a substrate transfer plane defined therein, a valve...
US-9,514,973 Lid-opening/closing device
A lid-opening/closing device includes a device body, a lock-opening/closing mechanism, and a container-securing unit. A pod including a container body, a lid...
US-9,514,972 Fixture drying apparatus and method
Wafer carrier washing and drying apparatus and method, especially useful for the semiconducting industry.
US-9,514,971 Door for thin plate container
A door which closes an opening in a container body of a thin plate container. A door body has latch passage holes in the circumference thereof, which correspond...
US-9,514,970 Methods of attaching a module on wafer substrate
Aspects of the present disclosure describe an attachment device for mounting a module to a substrate comprises a module leg with two ends and a module foot. One...
US-9,514,969 Apparatus for reducing the effect of contamination on a rapid thermal process
Embodiments of the present disclosure provide a cover assembly that includes a cover disposed between a device side surface of a substrate and a reflector...
US-9,514,968 Methods and apparatus for selective oxidation of a substrate
Methods and apparatus for improving selective oxidation against metals in a process chamber are provided herein. In some embodiments, a method of oxidizing a...
US-9,514,967 Plasma processing apparatus
A plasma processing apparatus includes a processing chamber for processing a sample with a plasma, an RF power supply for generating the plasma within the...
US-9,514,966 Apparatus and methods for shielding differential signal pin pairs
The disclosure is related to pin layouts in a semiconductor package. One embodiment of the disclosure provides a rhombus shaped shared reference pin layout that...
US-9,514,965 Substrate surface metallization method and substrate having metallized surface manufactured by the same
A substrate having metallized surface is provided. The substrate having metallized surface includes a silicon substrate, an adhesive layer and a metallic layer....
US-9,514,964 Stack frame for electrical connections and the method to fabricate thereof
A method for forming a conductive structure is disclosed, the method comprising the steps of: forming a metallic frame having a plurality of metal parts...
US-9,514,962 Method for performing activation of dopants in a GaN-base semiconductor layer
The method for performing activation of p-type dopants in a GaN-based semiconductor includes a first step of providing a substrate including (i) a GaN-based...
US-9,514,961 Method for chemically passivating a surface of a product made of a III-V semiconductor material and the product...
A method for chemically passivating a surface of a product made of a III-V semiconductor material in which a) a P(N) polymer film is formed by deposition in a...
US-9,514,960 Method for dissolving a silicon dioxide layer
This disclosure relates to a method for dissolving a silicon dioxide layer in a structure, including, from the back surface thereof to the front surface...
US-9,514,959 Fluorocarbon molecules for high aspect ratio oxide etch
Etching gases are disclosed for plasma etching channel holes, gate trenches, staircase contacts, capacitor holes, contact holes, etc., in Si-containing layers...
US-9,514,958 Etching method of semiconductor substrate, and method of producing semiconductor device
An etching method containing the step of processing a substrate having a first layer containing titanium nitride (TiN) and a second layer containing a...
US-9,514,957 Integrated circuit package
A method that may include of at least partially surrounding with an insulating encapsulation lead frames, an integrated circuit attachment and wire bonding...
US-9,514,956 Method of growing oxide thin films
Process for producing silicon oxide containing thin films on a growth substrate by the ALCVD method. In the process, a vaporisable silicon compound is bonded to...
US-9,514,955 Patterning of a hard mask material
A method for processing a substrate includes providing the substrate including a photoresist/bottom anti-reflection coating (PR/BARC) layer, a hard mask layer,...
US-9,514,954 Peroxide-vapor treatment for enhancing photoresist-strip performance and modifying organic films
Methods and apparatus for treating an organic film such as photoresist with a hydroxyl-generating compound prior to removing the organic film from a substrate...
US-9,514,953 Methods for barrier layer removal
Implementations described herein generally relate to semiconductor manufacturing and more particularly to methods for etching a low-k dielectric barrier layer...
US-9,514,952 Method of manufacturing semiconductor device and semiconductor manufacturing apparatus
A method of manufacturing a semiconductor device includes processing a plurality of substrates each provided with an etch target by using a chemical liquid, the...
US-9,514,951 Substrate processing method, substrate processing apparatus, substrate processing system and recording medium
A substrate processing method can remove a part of a processing target film formed on a surface of a substrate W under a normal pressure atmosphere while...
US-9,514,950 Methods for uniform imprint pattern transfer of sub-20 nm features
Methods of increasing etch selectivity in imprint lithography are described which employ material deposition techniques that impart a unique morphology to the...
US-9,514,949 Composition for forming organic hard mask layer for use in lithography containing polymer having acrylamide...
Whereas, conventionally, ashing had been used at the time of removal, the present invention provides a material for forming an organic hard mask that can be...
US-9,514,948 Stratified gate dielectric stack for gate dielectric leakage reduction
A stratified gate dielectric stack includes a first high dielectric constant (high-k) gate dielectric comprising a first high-k dielectric material, a...
US-9,514,947 Chromium/titanium/aluminum-based semiconductor device contact fabrication
A contact to a semiconductor including sequential layers of Cr, Ti, and Al is provided, which can result in a contact with one or more advantages over...
US-9,514,946 Semiconductor memory incorporating insulating layers of progressively decreasing band gaps and method of...
An improvement is achieved in the performance of a semiconductor device including a memory element. Over a semiconductor substrate, a gate electrode for the...
US-9,514,945 Nanocrystal memory and methods for forming same
A charge-storing device includes a charge-storing layer including nanocrystals. The nanocrystals are formed by a deposition technique incorporating deuterated...
US-9,514,944 Method for producing an SGT-including semiconductor device
A method for producing an SGT-including semiconductor device includes forming a gate insulating layer on an outer periphery of a Si pillar, forming a gate...
US-9,514,943 Method for etching high-k metal gate stack
A method for etching a gate includes forming a high-k material layer over a substrate; forming an overlying layer over the high-k material layer; performing a...
US-9,514,942 Method of forming a gate mask for fabricating a structure of gate lines
A method of forming a gate structure over a hybrid substrate structure with topography having a bulk region and an SOI region is disclosed including forming a...
US-9,514,941 Liquid crystal display device, manufacturing method therefor, and defective pixel correction method therefor
In a TFT substrate, a common signal line is arranged on top of a common electrode and below a pixel electrode through intermediation of an insulating film. The...
US-9,514,940 Reducing or eliminating pre-amorphization in transistor manufacture
A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a...
US-9,514,939 Dual coating and lift-off method for protecting patterned dielectric-metal coatings
A dual coating and lift-off method for protecting patterned dielectric-metal coatings using a 2-layer lithography process that is exposed and developed to...
US-9,514,938 Method of forming pattern
According to one embodiment, a method of forming a pattern includes applying a polymer material having a first segment and a second segment in openings formed...
US-9,514,937 Tapered nanowire structure with reduced off current
Non-planar semiconductor devices including at least one semiconductor nanowire having a tapered profile which widens from the source side of the device towards...
US-9,514,936 Particle and method for manufacturing same
Manufacturing a particle may include inserting a supporting body into a receiving groove on a first substrate to accommodate a first surface of the supporting...
US-9,514,935 Method of manufacturing semiconductor device, method of processing substrate, substrate processing apparatus,...
A method of manufacturing a semiconductor device is provided, which enables the film quality to be improved when the film is formed on a substrate at a low...
US-9,514,934 Atomic layer deposition of antimony oxide films
Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony...
US-9,514,933 Film deposition using spatial atomic layer deposition or pulsed chemical vapor deposition
Provided are atomic layer deposition methods to deposit a film using a circular batch processing chamber with a plurality of sections separated by gas curtains...
US-9,514,932 Flowable carbon for semiconductor processing
Methods are described for forming flowable carbon layers on a semiconductor substrate. A local excitation (such as a hot filament in hot wire CVD, a plasma in...
US-9,514,931 Low thermal conductivity matrices with embedded nanostructures and methods thereof
A matrix with at least one embedded array of nanowires and method thereof. The matrix includes nanowires and one or more fill materials located between the...
US-9,514,930 Method for manufacturing semiconductor HEMT device with stoichiometric silicon nitride layer
A semiconductor device includes: a compound semiconductor stack structure including a plurality of compound semiconductor layers stacked over a semiconductor...
US-9,514,929 Dielectric filling materials with ionic compounds
A method includes applying a filling material to a surface of a first layer overlying a substrate. The first layer includes a dielectric material with a...
US-9,514,928 Selective repairing process for barrier layer
A selectively repairing process for a barrier layer is provided. A repair layer is formed by chemical vapor deposition using an organosilicon compound as a...
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