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Patent # Description
US-9,513,921 Computer processor employing temporal addressing for storage of transient operands
A computer processor including a plurality of storage elements logically organized as a fixed length queue referenced by logical temporal addresses. The fixed...
US-9,513,920 Computer processor employing split-stream encoding
A computer processor is operably coupled to a memory system. The memory system is configured to store instruction blocks, wherein each instruction block is...
US-9,513,919 Method and apparatus for speculative decompression
An apparatus and method for performing parallel decoding of prefix codes such as Huffman codes. For example, one embodiment of an apparatus comprises: a first...
US-9,513,918 Apparatus and method for performing permute operations
An apparatus and method are described for permuting data elements with masking. For example, a method according to one embodiment includes the following...
US-9,513,917 Vector friendly instruction format and execution thereof
A vector friendly instruction format and execution thereof. According to one embodiment of the invention, a processor is configured to execute an instruction...
US-9,513,916 Instruction merging optimization
A computer-implemented method includes determining that two or more instructions of an instruction stream are eligible for optimization, where the two or more...
US-9,513,915 Instruction merging optimization
A computer system for optimizing instructions includes a processor including an instruction execution unit configured to execute instructions and an instruction...
US-9,513,914 Apparatus and method for processing an instruction that selects between single and multiple data stream...
A technique realizes execution of various combinations of arithmetic operations in, for example, SIMD floating-point multiply-add arithmetic operation, with...
US-9,513,913 SM4 acceleration processors, methods, systems, and instructions
A processor of an aspect includes a plurality of packed data registers, and a decode unit to decode an instruction. The instruction is to indicate one or more...
US-9,513,912 Memory controllers
Methods and controllers for executing an instruction set are provided. In one such method, executing an instruction set includes executing an instruction of one...
US-9,513,911 Method of detecting stack overflows and processor for implementing such a method
A method of detecting stack overflows includes the following steps: storing in at least one dedicated register at least one data item chosen from: a data item...
US-9,513,910 Requesting shared variable directory (SVD) information from a plurality of threads in a parallel computer
Methods, parallel computers, and computer program products for requesting shared variable directory (SVD) information from a plurality of threads in a parallel...
US-9,513,909 Variable updates of branch prediction states
Embodiments relate to variable branch prediction. An aspect includes determining a branch selection of an execution unit of a processor and determining whether...
US-9,513,908 Streaming memory transpose operations
According to one general aspect, an apparatus may include a load/store unit, an execution unit, and a first and a second data path. The load/store unit may be...
US-9,513,907 Methods, apparatus, instructions and logic to provide vector population count functionality
Instructions and logic provide SIMD vector population count functionality. Some embodiments store in each data field of a portion of n data fields of a vector...
US-9,513,906 Vector checksum instruction
A Vector Checksum instruction. Elements from a second operand are added together one-by-one to obtain a first result. The adding includes performing one or more...
US-9,513,905 Vector instructions to enable efficient synchronization and parallel reduction operations
In one embodiment, a processor may include a vector unit to perform operations on multiple data elements responsive to a single instruction, and a control unit...
US-9,513,904 Computer processor employing cache memory with per-byte valid bits
A computer processing system with a hierarchical memory system that associates a number of valid bits for each cache line of the hierarchical memory system. The...
US-9,513,903 Fault-tolerant system and fault-tolerant operating method capable of synthesizing result by at least two...
A fault-tolerant system including a calculation unit and an output synthesizer is provided. The calculation unit receives a first environmental parameter and...
US-9,513,902 Automated code coverage measurement and tracking per user story and requirement
Embodiments of the invention relate to automated code coverage measurement and tracking per user story and requirement. An aspect of the invention includes...
US-9,513,901 Deploying incremental scripts
A method and system of implementing continuous deployment of scripts in languages that only support single deployment. The method and system may develop...
US-9,513,900 Peripheral device and method for updating firmware thereof
A protective cover for an electronic device includes a memory configured to store at least an active firmware image and another firmware image, and circuitry...
US-9,513,899 System wide firmware updates to networked hospital beds
A hospital bed is programmable with new firmware that is downloaded to the bed over a network. The firmware is downloaded to the bed automatically from a remote...
US-9,513,898 Systems and methods for updating software in a hazard detection system
Systems and methods for updating software in a hazard detection system are described herein. Software updates may be received by, stored within, and executed by...
US-9,513,897 Portal for automatic software installation and configuration
A portal is established between a software installer and a client to allow on-line management of a software implementation project. The installer of...
US-9,513,896 Server, information processing system, and computer product
A server includes a receiver configured to receive, from an information processing apparatus that executes update, an instruction for transmitting metadata of...
US-9,513,895 Method and system for patch automation for management servers
A method for automatically patching a management server in a distributed network. The method includes receiving an instruction to patch an unpatched management...
US-9,513,894 Database software upgrade using specify-validate-execute protocol
A method, system, and computer program product for upgrading high-availability database systems. The method commences by specifying a subject database...
US-9,513,893 Scheduled downloads: enabling background processes to receive broadcast data
A digital broadcast network is disclosed that can provide scheduled updates for non-critical data in a different manner than critical data updates. Updates that...
US-9,513,892 Capturing and deploying an operating system in a computer environment
Systems and methods of capturing and deploying the operating system of a computing device. The method comprising: creating a file that contains one or more...
US-9,513,891 Method and device for publishing and implementing wireless application
Embodiments of the present application relate to a method of publishing a wireless application, a method of implementing a wireless application, a device for...
US-9,513,890 Method and system for installing software
Method and system are disclosed for providing multiple installations of a software application. The method/system creates an installation template from a single...
US-9,513,889 System and method of automating installation of applications
Disclosed are systems, methods and computer program products for automating installation of applications. In one aspect, the system launches an application...
US-9,513,888 Virtual preloads
A method of installing an application on a mobile communication device which comprises receiving, on a mobile communication device, a selection of a virtually...
US-9,513,886 Heap data management for limited local memory(LLM) multi-core processors
A compiler tool-chain may automatically compile an application to execute on a limited local memory (LLM) multi-core processor by including automated heap...
US-9,513,885 Web application development platform with relationship modeling
A system and method for dynamically creating web applications from data is described. Simple data is transformed into a declarative application data model that...
US-9,513,884 Thermal-aware source code compilation
Thermal-aware source code compilation including: receiving, by a compiler, an identification of a target computing system, the identification of the target...
US-9,513,883 Method and apparatus for designing layout for user interfaces
A method is provided that receives an image that includes graphical metadata for specifying alignment information. The method renders the image by using the...
US-9,513,882 Platform independent presentation composition
Architecture that includes a platform independent, configuration driven, presentation composition engine. The composition engine that allows dynamic generation...
US-9,513,881 System for the discovery and provisioning of artifacts and composites
A system for assisted generation of composite applications which are composed of instantiable components includes a portal system executing in memory of a...
US-9,513,880 Graphical function specialization
A device receives a state chart generated via a technical computing environment. The state chart includes a function block that includes a function that...
US-9,513,879 Model augmentation in a model-driven application development environment
A principal model is configured to facilitate automatic generation of at least one resource for use by a computer-executable application. The principal model...
US-9,513,878 Component integration by distribution of schema definition on heterogenous platforms
According to some embodiments, a method and system including a first technology stack to receive a model description describing defining aspects of an...
US-9,513,877 Generating comprehensive symbol tables for source code files
A computer program product includes instructions to identify a primary symbol table associated with a primary source code file and identify a secondary symbol...
US-9,513,876 Access operation with dynamic linking and access of data within plural data sources
A present invention embodiment includes a system with at least one processor for accessing data. The system creates a rule including one or more conditional...
US-9,513,875 Processing instruction information
A method and system for processing instruction information. Each instruction information character string of a sequence of instruction information character...
US-9,513,874 Enterprise computing platform with support for editing documents via logical views
Various technologies related to an enterprise computing platform are presented. Documents in a framework can be edited via logical views as described. An...
US-9,513,873 Computer-assisted release planning
A compute-implemented method and apparatus for assisting release planning, including steps of: obtaining remaining requirements that are expected to be included...
US-9,513,872 Random number generator
A system is described for generating random numbers. The system may include a plurality of information sources and one or more sampling devices coupled to each...
US-9,513,871 Floating point round-off amount determination processors, methods, systems, and instructions
A method of an aspect includes receiving a floating point round-off amount determination instruction. The instruction indicates a source of one or more floating...
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