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Patent # Description
US-9,520,437 Flexible APS X-ray imager with MOTFT pixel readout and a pin diode sensing element
A method of fabricating an X-ray imager including the steps of forming an etch stop layer on a glass substrate and depositing a stack of semiconductor layers on...
US-9,520,436 Solid-state imaging device and manufacturing method thereof
A solid-state imaging device includes a P-well, a gate insulating film, a gate electrode, a P.sup.+-type pinning layer that is located in the P-well so as to be...
US-9,520,435 Image sensor illuminated and connected on its back side
An image sensor including a semiconductor layer; a stack of insulating layers resting on the back side of the semiconductor layer; a conductive layer portion...
US-9,520,434 Image pickup module
An image pickup module includes: an image pickup chip including a main surface on which a light-receiving portion of an image pickup device and a plurality of...
US-9,520,433 Method of fabricating deep trench isolation structure in image sensor and device thereof
A method includes forming a deep trench isolation structure on a substrate, the substrate having a back surface opposite to a front surface, the deep trench...
US-9,520,432 Solid-state imaging devices with impurity regions between photoelectric conversion regions and methods for...
Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor...
US-9,520,431 Self-aligned isolation structures and light filters
An image sensor includes a semiconductor layer with a plurality of photodiodes. A plurality of isolation structures is disposed in the back side of the...
US-9,520,430 Solid state imaging apparatus, production method thereof and electronic device
A solid state imaging apparatus includes an insulation structure formed of an insulation substance penetrating through at least a silicon layer at a light...
US-9,520,429 Image sensor with protection layer having convex-shaped portions over the air spacers between the plurality of...
An image sensor includes a plurality of filters, an air spacer formed between the plurality of filters, and a protection layer including a first part formed on...
US-9,520,428 Image pickup apparatus
An image pickup apparatus includes an image pickup device chip having a first primary surface on which an image pickup section, a circuit section and a guard...
US-9,520,427 Image sensor including vertical transfer gate and method for fabricating the same
Provided is an image sensor having improved characteristics. An image sensor in accordance with an embodiment of the present invention may include a...
US-9,520,426 Vision sensor chip with open-loop amplifier, operating method, and data processing system including same
A vision sensor chip includes a photoelectric conversion element that generates a current based on an incident light, a current-voltage (I-V) converter that...
US-9,520,425 Image sensors with small pixels having high well capacity
An image sensor having small pixels with high charge storage capacity, low dark current, no image lag, and good blooming control may be provided. The high...
US-9,520,424 Black level correction (BLC) structure
One or more techniques or systems for forming a black level correction (BLC) structure are provided herein. In some embodiments, the BLC structure comprises a...
US-9,520,423 Image sensors including non-aligned grid patterns
An image sensor includes a substrate including a first surface and a second surface, a first device isolation layer disposed in the substrate and defining a...
US-9,520,422 Oxide thin film transistor and manufacturing method thereof, array substrate and display device
An oxide thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The method comprises: forming a gate...
US-9,520,421 Method for manufacturing LTPS TFT substrate and LTPS TFT substrate
The present invention provides a method for manufacturing a LTPS TFT substrate and a LTPS TFT substrate. The method for manufacturing the LTPS TFT substrate of...
US-9,520,420 Method for manufacturing array substrate, array substrate, and display device
The present invention provides a method for manufacturing an array substrate, an array substrate, and a display device. The method for manufacturing an array...
US-9,520,419 Thin film transistor array substrate and manufacturing method thereof
A method of manufacturing a thin film transistor (TFT) array substrate includes forming a gate line and a gate electrode on a substrate, forming a...
US-9,520,418 Active array substrate and manufacturing method thereof
An active array substrate includes a flexible substrate, an inorganic barrier layer, and at least one active component. The inorganic barrier layer covers the...
US-9,520,417 Method of manufacturing alignment film
A method of manufacturing an alignment film is provided, and has steps of determining printing regions for an alignment agent, which including display portions...
US-9,520,416 Thin film transistor array substrate and manufacturing method thereof
A method of manufacturing an array substrate includes applying a first color filter and a second color filter over a first and second pixel regions respectively...
US-9,520,415 Display device and method of fabricating the same
A display device and method of fabricating the same are disclosed. In one aspect, the display device includes a substrate, a black matrix formed over the...
US-9,520,414 Thin film transistor array substrate and method for manufacturing the same
The present invention proposes a TFT array substrate includes: a substrate; scan lines on the substrate; data lines intercrossing with the scan lines; a first...
US-9,520,412 Thin film transistor panel having an etch stopper on semiconductor
A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer...
US-9,520,411 Display device and electronic device including the same
A display device includes a pixel portion including a plurality of pixels each including a first transistor, a second transistor, and a light-emitting element,...
US-9,520,410 Display device and method for manufacturing the same
The present invention provides a method for manufacturing a highly reliable display device at a low cost with high yield. According to the present invention, a...
US-9,520,409 Three-dimensional nonvolatile memory device, semiconductor system including the same, and method of...
A three-dimensional nonvolatile memory device includes a first vertical channel layer and a second vertical channel layer extending from a substrate, a...
US-9,520,408 Semiconductor device and method of manufacturing the same
A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a core insulating film, a channel film surrounding...
US-9,520,407 Semiconductor memory device and method for manufacturing the same
A semiconductor memory device includes a connecting member including a semiconductor material, a first electrode film, a first insulating film, a stacked body...
US-9,520,406 Method of making a vertical NAND device using sequential etching of multilayer stacks
A method of making a vertical NAND device includes forming a lower portion of a memory stack over a substrate, forming a lower portion of memory openings in the...
US-9,520,405 Semiconductor device
A semiconductor device is provided. A channel layer is formed on a substrate. The channel layer is extended in a first direction substantially perpendicular to...
US-9,520,404 Asymmetric dense floating gate nonvolatile memory with decoupled capacitor
A nonvolatile memory ("NVM") bitcell includes a capacitor, an asymmetrically doped transistor, and a tunneling device. The capacitor, transistor, and tunneling...
US-9,520,403 Semiconductor memory device
A semiconductor memory device includes: a plurality of first channel columns including a plurality of first channel layers that are arranged in a direction and...
US-9,520,402 Provision of etch stop for wordlines in a memory device
Embodiments of the present disclosure are directed towards techniques to provide etch stops to the wordlines that form a staircase structure of a 3D memory...
US-9,520,401 Semiconductor devices capable of self-curing
A semiconductor device includes a plurality of first signal lines crossing a plurality of second signal lines. At least one of the first signal lines has a...
US-9,520,400 NOR structure flash memory and manufacturing method thereof
A NOR flash memory and its manufacturing method are provided in the present disclosure, they are in the field of flash memory. In the manufacturing method, a...
US-9,520,399 Floating body memory cell having gates favoring different conductivity type regions
A method for fabricating floating body memory cells (FBCs), and the resultant FBCs where gates favoring different conductivity type regions are used is...
US-9,520,398 Including low and high-voltage CMOS devices in CMOS process
A device includes a substrate, a deep well, a first well, and a second well. The deep well is formed in the substrate. The first well includes a first portion...
US-9,520,397 Abrupt source/drain junction formation using a diffusion facilitation layer
A method of forming a field effect transistor (FET) device includes forming a diffusion facilitation layer on top of a semiconductor substrate; forming a doped,...
US-9,520,396 Method for making high voltage integrated circuit devices in a fin-type process and resulting devices
Methods for making high voltage IC devices utilizing a fin-type process and resulting devices are disclosed. Embodiments include forming two pluralities of...
US-9,520,395 FinFET devices comprising a dielectric layer/CMP stop layer/hardmask/etch stop layer/gap-fill material stack
Provided are approaches for patterning multiple, dense features in a semiconductor device using a memorization layer. Specifically, an approach includes:...
US-9,520,394 Contact structure and extension formation for III-V nFET
FinFET devices including III-V fin structures and silicon-based source/drain regions are formed on a semiconductor substrate. Silicon is diffused into the III-V...
US-9,520,393 Fully substrate-isolated FinFET transistor
Channel-to-substrate leakage in a FinFET device can be prevented by inserting an insulating layer between the semiconducting channel and the substrate....
US-9,520,392 Semiconductor device including finFET and fin varactor
A semiconductor device includes a semiconductor substrate having a fin-type field effect transistor (finFET) on a first region and a fin varactor on a second...
US-9,520,391 Field effect transistor having delay element with back gate
Methods form complementary metal oxide semiconductor (CMOS) devices that include a first transistor and a complementary second transistor, and an output...
US-9,520,390 Electronic device including a capacitor structure and a process of forming the same
An electronic device can include a capacitor structure. In an embodiment, the electronic device can include a buried conductive region, a semiconductor layer...
US-9,520,389 Silicon-controlled rectifier and an ESD clamp circuit
A silicon-controlled rectifier (SCR) includes a first-type field, a second-type first field and a second-type second field disconnectedly formed in a first-type...
US-9,520,388 Method of forming a semiconductor device and structure therefor
In one embodiment, a semiconductor device may include a first transistor having a first current carrying electrode, a second current carrying electrode, and a...
US-9,520,387 Stacked package structure and method of forming a package-on-package device including an electromagnetic...
A stacked package structure is provided. The stacked package structure includes a stacked package including a lower semiconductor package, an upper...
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