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Patent # Description
US-9,520,336 Hybrid assembly with improved thermal performance
A method of improving the thermal performance of a hybrid assembly which comprises a first die, a second die, and indium bonds which bond and electrically...
US-9,520,335 Wavelength selective heat radiation material selectively radiating heat radiation light corresponding to...
An object is to provide a method for manufacturing a wavelength selective heat radiation material in which a surface roughness of an upper portion of a cavity...
US-9,520,334 Integrated structure with improved heat dissipation
An integrated structure includes a support supporting at least one chip and a heat dissipating housing, attached to the chip. The housing is thermally...
US-9,520,333 Wafer level package and fabrication method thereof
A semiconductor device includes a semiconductor device includes an interposer having a first side and a second side opposite to the first side, wherein the...
US-9,520,332 Wafer level package solder barrier used as vacuum getter
An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the...
US-9,520,331 Adaptive patterning for panelized packaging
An adaptive patterning method and system for fabricating panel based package structures is described. Misalignment for individual device units in a panel or...
US-9,520,330 Integrated circuit comprising PMOS transistors with different voltage thresholds
There is provided a method for the manufacture of an integrated circuit, including a substrate and an insulating layer formed on the substrate; a first pMOS...
US-9,520,329 Fully-depleted silicon-on-insulator transistors
A fully-depleted silicon-on-insulator (FDSOI) semiconductor structure includes: a first PFET, a second PFET, and a third PFET each having a different threshold...
US-9,520,328 Type III-V and type IV semiconductor device formation
Forming a semiconductor device is disclosed, according to embodiments of the present disclosure. Forming the semiconductor device can include forming a first...
US-9,520,327 Methods of forming low resistance contacts
Methods for forming electrical contacts are provided. First and second FETs are formed over a semiconductor substrate. Openings are etched in a dielectric layer...
US-9,520,326 Semiconductor device with high breakdown voltage and manufacture thereof
A semiconductor device includes: first and second n-type wells formed in p-type semiconductor substrate, the second n-type well being deeper than the first...
US-9,520,325 Methods for producing semiconductor devices
A method for producing a semiconductor device in accordance with various embodiments may include providing a semiconductor workpiece attached to a first...
US-9,520,324 Integrated circuit system with external resistor to provide constant current bias and method of manufacture thereof
An integrated circuit system, and a method of manufacture thereof, includes an integrated circuit package connected to a package interconnect connectible to an...
US-9,520,323 Microelectronic packages having trench vias and methods for the manufacture thereof
Embodiments of a microelectronic package including at least one trench via are provided, as are embodiments of a method for fabricating such a microelectronic...
US-9,520,322 Semiconductor device and method for manufacturing same
A semiconductor device includes a semiconductor substrate including a first surface in which an integrated circuit and an I/O pad electrically connected to the...
US-9,520,321 Integrated circuits and methods for fabricating integrated circuits with self-aligned vias
Integrated circuits and methods for fabricating integrated circuits with self-aligned vias are disclosed. A method for fabricating an integrated circuit...
US-9,520,320 TFT array substrate, method of manufacturing the same, and display device
A TFT substrate and a method of manufacturing the TFT array substrate are disclosed. The method includes providing a substrate, forming an organic layer on the...
US-9,520,318 Semiconductor device
A method for manufacturing a semiconductor device including a cell region and a peripheral region formed outside the cell region, comprising the steps of (a)...
US-9,520,317 Chip supplying apparatus
A chip supplying apparatus supplies a chip to a mounting machine which mounts the chip on a substrate is disclosed. The chip supplying apparatus includes wafer...
US-9,520,316 Separation device and pickup system
A separation device includes a mount table, projecting portion, and drawing port. The mount table includes a mount surface on which a pressure sensitive...
US-9,520,315 Electrostatic chuck with internal flow adjustments for improved temperature distribution
An electrostatic chuck is described with external flow adjustments for improved temperature distribution. In one example, an apparatus has a dielectric puck to...
US-9,520,314 High temperature electrostatic chuck bonding adhesive
Methods and apparatus for bonding an electrostatic chuck to a component of a substrate support are provided herein. In some embodiments, an adhesive for bonding...
US-9,520,313 Conveyance system and temporary storage method of articles in conveyance system
In a transport system, a track for a local carriage is provided directly below a track for overhead traveling vehicles, and the overhead traveling vehicles and...
US-9,520,312 System and method for moving workpieces between multiple vacuum environments
Provided are approaches for transferring workpieces between multiple pressure environments. In one approach, a system for moving workpieces between a first...
US-9,520,311 Processing facility
A processing facility is disclosed in which a container side contact surface and a support side contact surface are in contact with each other and a supply hole...
US-9,520,310 Wafer container with door interface seal
A wafer container may be a front opening wafer container comprising a container portion and a door, one of the container portion and the door having a radially...
US-9,520,309 Substrate processing apparatus and substrate processing method
A substrate processing apparatus for processing a substrate includes a transfer device which has a drive motor and transfers a substrate, a peripheral device...
US-9,520,308 Temperature control system for semiconductor manufacturing system
Provided is a temperature control system configured to mix a low temperature heating medium and a high temperature heating medium to supply the heating mediums...
US-9,520,307 Method and nozzle for hermetically sealed packaged devices
Microelectromechanical systems (MEMS) such as digital micromirror devices (DMD) are manufactured in arrays. Covers, packages, and lids are placed around each...
US-9,520,306 Method of fabricating an integrated circuit (IC) package having a plurality of spaced apart pad portion
A process for fabricating an integrated circuit package includes selectively etching a leadframe strip to define a die attach pad and a plurality of contact...
US-9,520,305 Power semiconductor arrangement and method of producing a power semiconductor arrangement
A power semiconductor device comprising a power semiconductor module and a heat sink; and a method for its manufacture. The module has a cooling plate, with an...
US-9,520,304 Semiconductor package and fabrication method thereof
A fabrication method of a semiconductor package is disclosed, which includes the steps of: providing a semiconductor structure having a carrier, a circuit...
US-9,520,303 Aluminum selective etch
Methods of selectively etching aluminum and aluminum layers from the surface of a substrate are described. The etch selectively removes aluminum materials...
US-9,520,302 Methods for controlling Fin recess loading
A method of processing a substrate includes depositing an oxide material on a substrate having a first region, a second region and a plurality of features,...
US-9,520,301 Etching method using plasma, and method of fabricating semiconductor device including the etching method
An etching method using plasma includes generating plasma by supplying process gases to at least one remote plasma source (RPS) and applying power to the at...
US-9,520,300 Semiconductor devices and methods of fabricating the same
The present disclosure describes semiconductor devices and methods of fabricating the same. The method includes forming an interlayer insulating layer on a...
US-9,520,299 Etch bias control
A semiconductor device and method for forming a semiconductor device are presented. The method includes providing a patterned reticle having a pattern perimeter...
US-9,520,298 Plasma method for reducing post-lithography line width roughness
The present disclosure is related to a method for treating a photoresist structure on a substrate, the method comprising producing one or more resist structures...
US-9,520,297 Semiconductor device and method of fabricating the same
A method of forming a semiconductor device includes sequentially forming a hard mask layer and a first sacrificial layer on a substrate, forming a first mandrel...
US-9,520,296 Semiconductor device having a low divot of alignment between a substrate and an isolation thereof and method of...
According to an exemplary embodiment, a method of forming vertical structures is provided. The method includes the following operations: providing a substrate;...
US-9,520,295 Metal doping of amorphous carbon and silicon films used as hardmasks in substrate processing systems
Systems and methods for depositing a metal-doped amorphous carbon hardmask film or a metal-doped amorphous silicon hardmask film includes arranging a substrate...
US-9,520,294 Atomic layer etch process using an electron beam
Atomic layer etching using alternating passivation and etching processes is performed with an electron beam plasma source, in which the ion energy is set to a...
US-9,520,293 Method for producing mechanically flexible silicon substrate
A method for making a mechanically flexible silicon substrate is disclosed. In one embodiment, the method includes providing a silicon substrate. The method...
US-9,520,292 Aging-based leakage energy reduction method and system
A technique of reducing leakage energy associated with a post-silicon target circuit is generally described herein. One example method includes purposefully...
US-9,520,291 Method of providing an implanted region in a semiconductor structure
According to an aspect of the present inventive concept there is provided a method of providing an implanted region in a semiconductor structure including a...
US-9,520,290 Ion implantation for improved etch performance
Provided herein are approaches for patterning a semiconductor device. In an exemplary approach, a method includes providing a set of patterning features atop a...
US-9,520,289 Methods of forming a pattern of a semiconductor device
In a method of forming a pattern of a semiconductor device, a hard mask layer is formed on a substrate. A photoresist film is coated on the hard mask layer. The...
US-9,520,288 Semiconductor device including IGZO layer and manufacturing method thereof
It is an object to provide a thin film transistor having favorable electric characteristics and high reliability and a semiconductor device which includes the...
US-9,520,287 Semiconductor device having stacked oxide semiconductor layers
One embodiment is a method for manufacturing a stacked oxide material, including the steps of forming an oxide component over a base component; forming a first...
US-9,520,286 Semiconductor substrate, semiconductor device and method of manufacturing the semiconductor device
A semiconductor substrate having a silicon-based substrate, a buffer layer provided on the silicon-based substrate and made of a nitride semiconductor...
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