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Method for writing in-system programming code into flash memory for better
The present invention provides a method for writing a data into a flash memory, wherein the flash memory is a Triple-Level Cell flash memory, and each storage...
Threshold voltage compensation in a memory
Threshold voltages in a charge storage memory are controlled by threshold voltage placement, such as to provide more reliable operation and to reduce the...
Memory elements with relay devices
Integrated circuits with memory elements are provided. An integrated circuit may include logic circuitry formed in a first portion having complementary...
Superconducting phase-controlled hysteretic magnetic Josephson junction
JMRAM memory cell
One embodiment describes a JMRAM memory cell system. The system includes a phase hysteretic magnetic Josephson junction (PHMJJ) that stores one of a first...
System and method for cryogenic hybrid technology computing and memory
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits,...
Asynchronous FIFO memory with read and write counter circuitry
A read count circuit and a write count circuit, each for providing a count of data read from or written to, respectively, an asynchronous FIFO memory device....
Methods and apparatus for designing and constructing dual write memory
circuits with voltage assist
Static random access memory (SRAM) circuits are used in most digital integrated circuits to store representations of data bits. To handle multiple concurrent...
Semiconductor device having hierarchical sense amplifiers assigned to
multiple local bit lines
A semiconductor device is equipped with memory cells which are provided at the intersections of word lines and local bit lines, hierarchical switches which are...
Semiconductor memory device including power supply line
A semiconductor apparatus disclosed in this disclosure includes a first channel formed in a first area and including a first power supply pad, a first clock...
Magnetization controlling element using magnetoelectric effect
A magnetization controlling element includes a ferromagnetic material layer, an exchange coupling adjustment layer, an antiferromagnetic material layer, an...
Method and apparatus for writing to a magnetic tunnel junction (MTJ) by
applying incrementally increasing...
A method of writing to magnetic tunnel junctions (MTJs) of a magnetic memory array includes storing in-coming data in a cache register, reading the present...
Magnetic random access memory (MRAM) and method of operation
A memory device includes a first memory cell having a first transistor, a second transistor, and a resistive storage element. During a read operation, sense...
Resistive change memory
A resistive change memory according to an embodiment includes: a memory cell including a resistive change element comprising a first and second terminals, and a...
Volume select for affecting a state of a non-selected memory volume
Apparatuses and methods of operating memory are described. One such method can include receiving a select command at a plurality of memory volumes of a memory...
One semiconductor device includes a clock signal buffer circuit which, in response to activation of a chip selection signal (CS_n), starts generation of an...
Nonvolatile memory devices, memory systems and related control methods
A nonvolatile memory device includes a cell array including a plurality of cell strings extending on a substrate in a vertical direction, a page buffer...
Semiconductor memory device using delays to control column signals for
different memory regions
A semiconductor memory device includes a first signal generation unit configured to sequentially generate first and second delay signals in response to a first...
Semiconductor memory device and operation method thereof
A semiconductor memory device according to an embodiment includes a control circuit configured to apply a first voltage to a selected first line, apply a second...
High-speed pseudo-dual-port memory with separate precharge controls
A pseudo-dual-port (PDP) memory such as a PDP SRAM is provided that independently controls the bit line precharging and the sense amplifier precharging to...
ZQ calibration circuit and semiconductor device including the same
According to one embodiment, a ZQ calibration circuit comprises a replica buffer controller configured to apply electric stress to a replica buffer circuit with...
Regulator circuit and semiconductor memory apparatus having the same
A regulator circuit may include a comparison unit configured to compare a reference voltage with a feedback voltage and generate a first switching signal. The...
DIMM device controller supervisor
The various implementations described herein include systems, methods and/or devices used to enable performing supervisory functions for a dual in-line memory...
Methods for calculating and determining reference values for semiconductor
A method and associated apparatus to determine a reference value on the basis of a plurality of half reference values stored in memory cells is disclosed,...
Printed circuit board and memory module including the same
A memory module includes a plurality of semiconductor memory devices and a circuit board. The circuit board is electrically connected to the plurality of...
Apparatus for storing solid state drives or hard disk drives
An apparatus includes a container having a base for receiving a drive, and a clam having a first end that is rotatably coupled to the base, a second end, and a...
A fastening device for securing and protecting an electronic device is provided. The electronic device is provided with at least one assembly hole. The...
Storage modes for measurement values and contextual information
In one aspect, a portable handheld measurement device automatically stores measurement values in volatile memory in a limited replay storage mode that comprises...
Content preview generation
A content preview of a content item is generated by extracting one or more clips from the content item, each clip is identified using a clipping point, a clip...
Methods and systems for seeking to non-key frames
Methods and systems for seeking to a non-key frame in a compressed video. The compressed video has a plurality of frames, each with a playback timestamp. At...
Apparatus and method for displaying images
Disclosed herein is an image display apparatus including a storage unit storing a plurality of images, an input unit receiving a selection command for selecting...
Apparatus with disc separator plates
Certain exemplary aspects of the present disclosure are directed towards an apparatus including a base deck, a plurality of storage mediums (e.g., discs) and a...
Optical information recording/reproducing apparatus
A hologram apparatus and hologram optical system includes: a light source which emits a light beam; a splitter which splits the light beam emitted from the...
Multiple layer FePt structure
A method involves depositing a seed layer comprising at least A1 phase FePt. A main layer of A1 phase FePt is deposited over the seed layer. The main layer...
Flexible package and method of making same
A flexible package being capable and being adapted for accommodating a multiplicity of absorbent articles. The package has a substantially parallelepiped-shape...
Direct current magnetoresistive jog offset compensation
Systems and methods for compensating for magnetoresistive (MR) jog offset direct current (DC) drift in a disc drive are described. In one embodiment, a method...
Reset of magnetic domains in write head via external field
Methods of removing a magnetic domain from a slider structure, such as a shield in a write head, in a data storage assembly. The method comprises passing the...
Side shielded magnetoresistive (MR) read head with perpendicular magnetic
A MR sensor is disclosed that has a free layer (FL) with perpendicular magnetic anisotropy (PMA) which eliminates the need for an adjacent hard bias structure...
Method of forming a fully wrapped-around shielded PMR writer pole
A method of forming a wrapped-around shielded perpendicular magnetic recording writer pole is disclosed. A structure comprising a leading shield layer and an...
Magnetic tape rewind overwrite data protection
A computer-implemented method for preventing overwriting of data, e.g., on a magnetic medium, includes receiving a write command to write to a magnetic tape....
Determining a harmonicity measure for voice processing
A method, an apparatus, and a computer-readable medium configured with instructions that when executed carry out the method for determining a measure of...
Foreign language learning apparatus and method for correcting
pronunciation through sentence input
A foreign language learning apparatus and method are provided. The foreign language learning apparatus includes a sentence input unit receiving a first sentence...
Efficient apparatus and method for audio signature generation using
Audio information is monitored by a user device by generating audio signatures of ambient audio content captured by the user device, receiving conditions of the...
Keyboard typing detection and suppression
Provided are methods and systems for detecting the presence of a transient noise event in an audio stream using primarily or exclusively the incoming audio...
Speech dereverberation methods, devices and systems
Improved audio data processing method and systems are provided. Some implementations involve dividing frequency domain audio data into a plurality of subbands...
Post tone suppression for speech enhancement
A method for reducing disturbing tone signals from acoustic echoes or background noises in speech/audio signal enhancement processing comprises decomposing a...
Adaptive modulation filtering for spectral feature enhancement
Techniques described herein are directed to the enhancement of spectral features of an audio signal via adaptive modulation filtering. The adaptive modulation...
Method for suppressing the late reverberation of an audio signal
A method for suppressing the late reverberation of an audio signal. A plurality of prediction vectors are calculated. A plurality of observation vectors from...
Frame error concealment method and apparatus, and audio decoding method
Disclosed are a frame error concealment method and apparatus and an audio decoding method and apparatus. The frame error concealment (FEC) method includes:...
Reconstructing audio signals with multiple decorrelation techniques
A method performed in an audio decoder for decoding M encoded audio channels representing N audio channels is disclosed. The method includes receiving a...
System for perceived enhancement and restoration of compressed audio
A system for processing compressed audio includes a signal enhancer module configured to generate one or more signal treatments. The one or more signal...