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Patent # Description
US-9,530,685 Isolation trench through backside of substrate
Among other things, one or more semiconductor arrangements comprising isolation trenches, and techniques for forming such isolation trenches are provided. A...
US-9,530,684 Method and structure to suppress finFET heating
Embodiments of the present invention provide structures and methods for heat suppression in finFET devices. Fins are formed in a semiconductor substrate. A...
US-9,530,683 Forming source/drain zones with a dielectric plug over an isolation region between active regions
An embodiment includes forming an isolation region between first and second active regions in a semiconductor, forming an opening between the first and second...
US-9,530,682 System and apparatus for holding a substrate over wide temperature range
An apparatus to support a substrate may include a base, a clamp portion to apply a clamping voltage to the substrate, and a displacement assembly configured to...
US-9,530,681 Method to provide the thinnest and variable substrate thickness for reliable plastic and flexible electronic device
An electronic device is formed by depositing polyimide on a glass substrate. A conductive material is deposited on the polyimide and patterned to form...
US-9,530,680 Method of fabricating semiconductor package, semiconductor chip supporting carrier and chip mounting device
In fabricating semiconductor packages, a first supporting unit is supported by a supporting substrate with one surface of an adhesive sheet directed upward, the...
US-9,530,679 Method and apparatus for chuck thermal calibration
A chuck includes a first material layer having an upper surface upon which a wafer is supported. The upper surface includes portions that physically contact the...
US-9,530,678 Substrate carrier system for moving substrates in a vertical oven and method for processing substrates
A substrate carrier system for moving substrates in a vertical oven and a method for processing substrates are disclosed. In some embodiments, a method for...
US-9,530,677 Substrate processing apparatus and semiconductor device manufacturing method
A substrate processing apparatus comprises a processing chamber for storing a substrate and performing a specified processing on the substrate, a substrate...
US-9,530,676 Substrate processing apparatus, substrate transfer method and substrate transfer device
A substrate processing apparatus can prevent photo-corrosion of, e.g., copper interconnects due to exposure of a surface to be processed of a substrate to...
US-9,530,675 Wafer handling station including cassette members with lateral wafer confining brackets and associated methods
A wafer handling station includes a housing defining a chamber, and a wafer cassette assembly positionable in the chamber. The wafer cassette assembly includes...
US-9,530,674 Method and system for three-dimensional (3D) structure fill
Embodiments include methods and systems of 3D structure fill. In one embodiment, a method of filling a trench in a wafer includes performing directional plasma...
US-9,530,673 Apparatus and method for self-aligning chip placement and leveling
An approach is provided for aligning and leveling a chip package portion. The approach involves filling, at least partially, a reservoir formed between a first...
US-9,530,672 Production method for a semiconductor device
A method for producing a semiconductor device includes providing a semiconductor substrate having a first conductivity type; implanting protons through a rear...
US-9,530,671 Etching method
An etching method for etching an object to be processed in a processing chamber including a first electrode and a second electrode disposed facing the first...
US-9,530,670 Methods of forming conductive patterns and methods of manufacturing semiconductor devices using the same using...
The present disclosure herein relates to methods of forming conductive patterns and to methods of manufacturing semiconductor devices using the same. In some...
US-9,530,669 Method of making a semiconductor device having a semiconductor material on a relaxed semiconductor including...
A semiconductor device comprising a substrate having a region protruding from the substrate surface; a relaxed semiconductor disposed on the region; an...
US-9,530,668 Thin-film pattern array and production method therefor
Disclosed are: a thin-film pattern array able to minimize level differences between thin films; and a production method therefor. The thin-film pattern array...
US-9,530,667 Method for roughness improvement and selectivity enhancement during arc layer etch using carbon
A method of patterning a silicon containing ARC (anti-reflective coating) layer underlying a patterned layer is described that includes establishing a flow of a...
US-9,530,666 Plasma etching method and plasma etching apparatus
A plasma etching method includes a first process and a second process. In the first process, a hole is formed in a processing target film formed on a substrate...
US-9,530,665 Protective trench layer and gate spacer in finFET devices
Forming a field effect transistor device includes forming first and second semiconductor fins on a semiconductor substrate. The first and second semiconductor...
US-9,530,664 Method for manufacturing electronic device by forming a hole in a multilayer insulator film by plasma etching
A method includes the stage of partially removing a first insulator layer to form an opening passing through the first insulator layer by plasma etching using a...
US-9,530,663 Method for forming a pattern
A method for forming a pattern includes steps of forming a patterned core layer on a substrate, conformally forming a spacer layer on the patterned core layer...
US-9,530,662 Methods for fabricating integrated circuits using directed self-assembly including a substantially periodic...
Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming a substantially...
US-9,530,661 Method of modifying epitaxial growth shape on source drain area of transistor
Methods for forming semiconductor devices, such as FinFETs, are provided. An epitaxial film is formed over a semiconductor fin, and the epitaxial film includes...
US-9,530,660 Multiple directed self-assembly patterning process
Disclosed is a method of forming a target pattern for a semiconductor device using multiple directed self-assembly (DSA) patterning processes. The method...
US-9,530,659 Structure for preventing buried oxide gouging during planar and FinFET Processing on SOI
A structure for manufacturing a semiconductor device without damaging the insulator layer during creation of fin field effect transistor (FinFET) devices...
US-9,530,658 Continuous plasma etch process
A method for processing a substrate in a process chamber is provided. A plurality of cycles is provided to process the substrate, wherein each cycle comprises...
US-9,530,657 Method of processing substrate and substrate processing apparatus
A method of processing a substrate using a substrate processing apparatus that has an electrostatic chuck including an insulating member inside which an...
US-9,530,656 Temperature control in RF chamber with heater and air amplifier
Systems, methods, and computer programs are presented for controlling the temperature of a window in a semiconductor manufacturing chamber. One apparatus...
US-9,530,655 Slurry composition for chemical mechanical polishing of Ge-based materials and devices
A CMP slurry composition which provides for a high Ge- or SiGe-to-dielectric material selectivity a low rate of Ge or SiGe recess formation includes an oxidant...
US-9,530,654 FINFET fin height control
Fin height control techniques for FINFET fabrication are disclosed. The technique includes a method for controlling the height of plurality of fin structures to...
US-9,530,653 High speed electroplating metallic conductors
One embodiment is a method for producing void-free electroplated metallic conductors inside openings by electrochemical deposition (ECD), said method including...
US-9,530,652 Method for producing patterned metal nanowires, electrode using the patterned metal nanowires, and transistor...
The present invention relates to a method of producing patterned silver nanowire, comprising: coating a photosensitive polyamide acid polymer solution on a...
US-9,530,651 Replacement metal gate finFET
A field effect transistor device includes a fin including a semiconductor material arranged on an insulator layer, the fin including a channel region, a...
US-9,530,650 Method of creation of defects using X-ray radiation and electric field and its application
The goal is the improvement of technologies of modification of material properties by decreasing expenditures of energy and time and extending possibilities for...
US-9,530,649 Semiconductor electronic devices and methods of manufacture thereof
A method of manufacturing an electronic device comprises: providing a layer of semiconductor material comprising a first portion, a second portion, and a third...
US-9,530,647 Devices including ultra-short gates and methods of forming same
Provided are devices including ultra-short gates and methods of forming same. Methods include forming a first gate pattern on a semiconductor that includes a...
US-9,530,646 Method of forming a semiconductor structure
A method of forming a semiconductor structure includes following steps. First of all, a patterned hard mask layer having a plurality of mandrel patterns is...
US-9,530,645 Pattern forming method, pattern forming apparatus, and non-transitory computer-readable storage medium
A photoresist pattern used for forming a pattern of a block copolymer is formed on a substrate, and then an acid solution is supplied and an alkaline solution...
US-9,530,644 Polysilicon manufacturing method that enhances homogeneity of polysilicon layer
The present invention provides a polysilicon manufacturing method that enhances homogeneity of a polysilicon layer, including (1) forming a amorphous silicon...
US-9,530,643 Selective epitaxy using epitaxy-prevention layers
A method for forming an epitaxial structure includes providing a two-dimensional material on a crystal semiconductor material and opening up portions of the...
US-9,530,642 Method for producing SiC single crystal
Provided is a method for producing an SiC single crystal, which is capable of greatly increasing the growth rate in a solution technique in comparison to...
US-9,530,641 Method for manufacturing semiconductor device, substrate processing apparatus, and recording medium
There is provided a method for manufacturing a semiconductor device, including: forming a film on a substrate by performing a cycle a prescribed number of...
US-9,530,640 Oxide semiconductor film
An oxide semiconductor film includes indium (In), cerium (Ce), zinc (Zn) and oxygen (O) elements, and a molar ratio of the In, Ce, and Zn as In:Ce:Zn is in a...
US-9,530,639 Method of preparing ZnO nanowire and ZnO nanowire prepared thereby
A method of preparing a ZnO nanowire, and a ZnO nanowire prepared by the method are provided. The method of preparing a ZnO nanowire includes: preparing a zinc...
US-9,530,638 Method to grow thin epitaxial films at low temperature
Implementations of the present disclosure generally relate to methods for epitaxial growth of a silicon material on an epitaxial film. In one implementation,...
US-9,530,637 Fin structure formation by selective etching
Methods and apparatus for forming FinFET structures are provided. Selective etching and deposition processes described herein may provide for FinFET...
US-9,530,636 Light source with nanostructured antireflection layer
A laser-sustained plasma light source includes a plasma cell configured to contain a volume of gas. The plasma cell is configured to receive illumination from a...
US-9,530,635 Methods for detecting lacosamide by mass spectrometry
Provided are methods for determining the amount of lacosamide in a sample using mass spectrometry. The methods generally involve ionizing lacosamide in a sample...
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