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Patent # Description
US-9,536,977 Vertical tunneling field-effect transistor cell and fabricating the same
A tunneling field-effect transistor (TFET) device is disclosed. A frustoconical protrusion structure is disposed over a substrate and protruding out of the...
US-9,536,976 Trench schottky rectifier device and method for manufacturing the same
A method for fabricating a trench Schottky rectifier device is provided. At first, a plurality of trenched are formed in a substrate of a first conductivity...
US-9,536,975 Ferroelectric devices including a layer having two or more stable configurations
Ferroelectric semiconductor devices are provided by including a ferroelectric layer in the device that is made of a material that is not ferroelectric in bulk....
US-9,536,974 FET device with tuned gate work function
A method of forming a semiconductor device is provided including forming a gate structure comprising a metal-containing layer over a semiconductor layer and...
US-9,536,973 Metal-oxide-semiconductor field-effect transistor with metal-insulator-semiconductor contact structure to...
A method includes depositing a first metal layer on a native SiO.sub.2 layer that is disposed on at least one of a source and a drain of a ...
US-9,536,972 Trench power MOSFET and manufacturing method thereof
A trench power MOSFET and a manufacturing method thereof are provided. The gate of the trench power MOSFET includes an upper doped region, a lower doped region...
US-9,536,971 Semiconductor device comprising a transistor gate having multiple vertically oriented sidewalls
A method used in fabrication of a recessed access device transistor gate has increased tolerance for mask misalignment. One embodiment of the invention...
US-9,536,970 Three-dimensional semiconductor memory devices and methods of fabricating the same
Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure...
US-9,536,969 Self-aligned split gate flash memory
The present disclosure relates to a self-aligned split gate memory cell, and an associated method. The self-aligned split gate memory cell has cuboid shaped...
US-9,536,968 Semiconductor devices including contact patterns having a rising portion and a recessed portion
Semiconductor devices may include a gate pattern and a contact pattern disposed on an active region. The contact pattern may include a recessed portion near the...
US-9,536,967 Recessed ohmic contacts in a III-N device
A device includes a III-N layer having an upper side and a lower side, the lower side being opposite the upper side, and at least one conductive contact on the...
US-9,536,966 Gate structures for III-N devices
A semiconductor device includes a III-N layer, a plurality of parallel conductive fingers on the III-N layer, an insulator layer over the III-N layer, and a...
US-9,536,965 Heat spreader on GaN semiconductor device
A semiconductor device comprises: a substrate; a multilayer semiconductor layer located on the substrate; a source located on the multilayer semiconductor...
US-9,536,964 Method for forming via profile of interconnect structure of semiconductor device structure
A method for forming the semiconductor device structure is provided. The method includes forming a first metal layer over a substrate and forming a dielectric...
US-9,536,963 Electrode structure of a transistor, and pixel structure and display apparatus comprising the same
An electrode structure of a transistor, and a pixel structure and a display apparatus comprising the electrode structure of the transistor are disclosed. The...
US-9,536,962 Source/drain regions for high electron mobility transistors (HEMT) and methods of forming same
An embodiment high electron mobility transistor (HEMT) includes a gate electrode over a semiconductor substrate and a multi-layer semiconductor cap over the...
US-9,536,961 Reverse conducting insulated gate bipolar transistor
A semiconductor layer of a reverse conducting insulated gate bipolar transistor is provided with a drift region of a first conductive type, a body region of a...
US-9,536,960 Semiconductor device comprising a field electrode
A semiconductor device includes a gate electrode adjacent to a body region in a semiconductor substrate. The semiconductor device further includes a field...
US-9,536,959 Power semiconductor device having field plate electrode
A semiconductor device includes first to third semiconductor regions, first to fourth electrodes and a first insulating film. The first insulating film is...
US-9,536,958 Semiconductor substrate and a method of manufacturing the same
The semiconductor substrate includes a high-ohmic semiconductor material with a conduction band edge and a valence band edge, separated by a bandgap, wherein...
US-9,536,957 P-type oxide, composition for producing p-type oxide, method for producing p-type oxide, semiconductor element,...
To provide is a p-type oxide, including an oxide, wherein the oxide includes: Cu; and an element M, which is selected from p-block elements, and which can be in...
US-9,536,955 Nitride semiconductor substrate
A nitride semiconductor substrate is provided which is suitable for a high withstand voltage power device and prevents a warp and a crack from generating in a...
US-9,536,954 Substrate with silicon carbide film, semiconductor device, and method for producing substrate with silicon...
A substrate with a silicon carbide film includes a silicon substrate, a SiC film, and a mask 4. The SiC film has a film 31 including openings 35 on the silicon...
US-9,536,953 Method for making a sensor device using a graphene layer
A graphene layer is generated on a substrate. A plastic material is deposited on the graphene layer to at least partially cover the graphene layer. The...
US-9,536,952 Body contact layouts for semiconductor structures
Body contact layouts for semiconductor structures are disclosed. In at least one exemplary embodiment, a semiconductor structure comprises: a plurality of gates...
US-9,536,951 FinFET transistor comprising portions of SiGe with a crystal orientation [111]
FinFET transistor comprising at least: one fin that forms a channel, a source and a drain, comprising an alternating stack of first portions of silicon-rich...
US-9,536,950 Semiconductor device and method of fabricating the same
A semiconductor device may include a strain relaxed buffer layer provided on a substrate to contain silicon germanium, a semiconductor pattern provided on the...
US-9,536,949 Nitride semiconductor device comprising nitride semiconductor regrowth layer
A nitride semiconductor device according to one embodiment of the present disclosure includes: a substrate; a first nitride semiconductor layer supported by the...
US-9,536,948 Semiconductor device, method of manufacturing the same, and power module
A semiconductor device includes an n-type drain layer, an n-type base layer provided on the n-type drain layer, a p-type base layer and an n-type source layer...
US-9,536,947 Silicon nanowire device and method for its manufacture
There is provided an electronic device and a method for its manufacture. The device comprises an elongate silicon nanowire less than 0.5 .mu.m in ...
US-9,536,946 Semiconductor device and method for manufacturing the same
A semiconductor device includes a substrate having an active region, a gate structure intersecting the active region and extending in a first direction parallel...
US-9,536,945 MOSFET with ultra low drain leakage
A semiconductor device includes a monocrystalline substrate configured to form a channel region between two recesses in the substrate. A gate conductor is...
US-9,536,944 Semiconductor device and method of manufacturing same
A semiconductor device has a deep layer with a higher impurity concentration than that of a super junction structure. The deep layer is formed from a position...
US-9,536,943 Vertical power MOSFET
Vertical power MOSFETs having a super junction are devices capable of having a lower on resistance than other vertical power MOSFETs. Although they have the...
US-9,536,942 Semiconductor device having a plurality of electric field relaxation layers and method for manufacturing same
A semiconductor device includes an active region formed in an upper layer portion of a semiconductor layer of a first conductivity type, and a plurality of...
US-9,536,941 Gate pad and gate feed breakdown voltage enhancement
A semiconductor chip includes a semiconductor layer having first and second opposing main surfaces. A plurality of MOSFET cells are at least partially formed in...
US-9,536,940 Interfacial materials for use in semiconductor structures and related methods
A method of forming a semiconductor structure. The method comprises forming a high-k dielectric material, forming a continuous interfacial material over the...
US-9,536,939 High density vertically integrated FEOL MIM capacitor
A metal-insulator-metal (MIM) capacitor is provided on a surface of an insulator layer that is located on a handle substrate. The MIM capacitor includes a first...
US-9,536,938 Semiconductor device including a resistor metallic layer and method of forming the same
A semiconductor device including a resistor metallic layer and method forming the same. In one embodiment, the semiconductor device includes a source region and...
US-9,536,937 Semiconductor device having a rectifying element connected to a pixel of a display device
When writing a signal current from a current source to a current source circuit, noise occurs in some cases in a wiring through which a current flows, which may...
US-9,536,936 Organic light emitting diode display
An organic light emitting diode display includes a display substrate, a sealing member disposed to face the display substrate, a sealant disposed between the...
US-9,536,935 Organic thin film transistor merged with a light emitting diode using an accumulation layer as electrode
A novel light-emitting device includes an organic thin-film structure that is merged with an organic light-emitting diode structure by utilizing a part of the...
US-9,536,934 OLED array substrate
The present invention provides an OLED array substrate, a manufacturing method of the same, a display panel, and a display device, and relates to the field of...
US-9,536,933 Display device having a light emitting layer on the auxiliary layer
A display device, in which self-luminous elements are arranged, prevents a leakage current through a common layer, provided for the self-luminous elements and...
US-9,536,932 Method of making a semiconductor lighting emitting device that prevents defect of the mask without increasing steps
As a result of miniaturization of a pixel region associated with an improvement in definition and an increase in a substrate size associated with an increase in...
US-9,536,931 Organic light emitting device and manufacturing method thereof
An organic light emitting diode (OLED) display with an improved light efficiency and a method of manufacturing the OLED display are disclosed. The OLED display...
US-9,536,930 Display device
In a display device including an device substrate arranged with a plurality of pixels arranged with a light emitting device, a color filter layer with different...
US-9,536,929 Display device and method of manufacturing the same
According to one embodiment, a method of manufacturing a display device, includes preparing a first substrate formed such that a first resin layer is formed on...
US-9,536,928 Organic light-emitting display device
An organic light-emitting display device comprising a substrate; an insulating layer disposed on the substrate; a plurality of bottom electrodes arranged on the...
US-9,536,927 Method for producing semiconductor device
A method for producing a semiconductor device includes forming a fin-shaped semiconductor layer on a semiconductor substrate and a first pillar-shaped...
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