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Liquid-crystal display and element substrate thereof
An element substrate is provided, including a substrate, a metal layer and a planarization layer. The metal layer is located on the substrate. The metal layer...
A display panel is provided. The display panel includes a substrate including a non-display region containing a thin film transistor, which includes a...
A display apparatus including a display area on a substrate, the display area including at least a display device; and a non-display area adjacent to the...
Array substrate, display panel and display device
An array substrate comprises: a plurality of flexible cushions; and a plurality of signal lines, wherein the signal lines have ends respectively located on the...
Array substrate and manufacturing method thereof, display device
An array substrate and manufacturing method thereof, and a display device are capable of preventing light reflection from a drain electrode, and guaranteeing...
Method of manufacturing a thin film transistor and a pixel structure
A method manufacturing a thin film transistor is provided. A gate, a first insulation layer covering the gate, a semiconductor layer over the gate, and a first...
Thin film transistor substrate and method for manufacturing the same
A thin film transistor substrate includes: a gate insulating film that covers a gate electrode and a common electrode; a transparent oxide film selectively...
Metal oxide TFT device and method for manufacturing the same
A method for manufacturing a metal oxide TFT device is provided. The method includes: selecting a substrate and forming a gate electrode on a first side of the...
Semiconductor device having insulation layer with concave portion and
semiconductor layer that includes channel...
A first insulation layer includes a concave portion. A semiconductor layer includes a source area and a drain area, and a channel area disposed at the concave...
According to one embodiment, a display device includes a first light shielding layer, a second light shielding layer, a first semiconductor layer, a second...
Array substrate and manufacturing method thereof, liquid crystal display
panel and display device
An array substrate and a manufacturing method thereof, a liquid crystal display panel and a display device are provided, the array substrate comprises a base...
Array substrate, display device and manufacturing method of the array
An array substrate, a display device and a manufacturing method of the array substrate. The array substrate includes: a base substrate (1) and a plurality of...
Strain release in PFET regions
A method for fabricating a semiconductor device, includes providing a strained silicon on insulator (SSOI) structure, the SSOI structure comprises, a dielectric...
Methods for producing a thin film ferroelectric device using a two-step
temperature process on an organic...
Methods for producing ferroelectric device are described. A method includes positioning an organic polymeric ferroelectric layer between two conductive...
Semiconductor memory device and method of manufacturing the same
A semiconductor memory device according to an embodiment comprises a stacked body, a semiconductor layer, a charge accumulation layer, and a slit portion. The...
Three-dimensional memory structure having self-aligned drain regions and
methods of making thereof
A memory stack structure can be formed through a stack of an alternating plurality of first material layers and second material layers and through an overlying...
Vertical channel structure
A vertical channel structure including a substrate, a plurality of stacked structures, a charge storage structure, a channel structure and a dielectric...
Three dimensional memory device with epitaxial semiconductor pedestal for
An alternating stack of insulator layers and spacer material layers is formed over a substrate. Stepped surfaces are formed in a contact region in which contact...
Semiconductor device and method of manufacturing the same
A semiconductor device includes interlayer insulating films spaced apart from each other and stacked over each other, and wherein first ends of the interlayer...
Semiconductor memory device and method of fabricating the same
Inventive concepts provide semiconductor memory devices and methods of fabricating the same. A stack structure and vertical channel structures are provided on a...
The memory cell includes a gate insulating film, a control gate electrode, a cap insulating film, a cap layer, another gate insulating film, and a memory gate...
Manufacturing method of semiconductor device and semiconductor device
A semiconductor device including a memory cell having a control gate electrode and a memory gate electrode formed via a charge accumulation layer with respect...
Nonvolatile memory device and method for fabricating the same
A nonvolatile memory device includes: a channel layer protruding perpendicular to a surface of a substrate; a tunnel insulation layer formed on a surface of the...
Method for manufacturing a nonvolatile memory device
A method for manufacturing a nonvolatile memory device in accordance with an embodiment of the present invention may include providing a substrate comprising a...
Vertical memory cell with non-self-aligned floating drain-source implant
Various embodiments provide a memory cell that includes a vertical selection gate, a floating gate extending above the substrate, wherein the floating gate also...
Semiconductor storage device having communicated air gaps between adjacent
A semiconductor storage device according to an embodiment of the invention includes a semiconductor substrate and a plurality of memory cells on the...
Antifuse memory cells and arrays thereof
An antifuse memory cell includes an antifuse element and a gate PN diode. The antifuse element includes a gate terminal coupled to a word line, a drain terminal...
A semiconductor device includes a bit line structure on a substrate, the bit line structure having a polysilicon layer pattern doped with impurities, and a...
Vertical memory devices and methods of manufacturing the same
A method of manufacturing a vertical memory device includes: providing a substrate including a cell array region and a peripheral circuit region; forming a mold...
Sub word line driver of a semiconductor memory device
A sub word line driver of a semiconductor memory device including a sub word line driver is disclosed. The sub word line driver of a semiconductor memory device...
Reverse conducting power semiconductor device
A RC power semiconductor is provided which comprises a plurality of diode cells and a plurality of GCT cells. Each GCT cell comprises a first cathode layer with...
Vertical junction FinFET device and method for manufacture
A vertical junction field effect transistor (JFET) is supported by a semiconductor substrate that includes a source region within the semiconductor substrate...
Complementary metal oxide semiconductor device with dual-well and
manufacturing method thereof
The present invention discloses a dual-well complementary metal oxide semiconductor (CMOS) device and a manufacturing method thereof. The dual-well CMOS device...
Forming IV fins and III-V fins on insulator
A semiconductor structure including: a set of first fins in a pFET region and a set of second fins in an nFET region, the first fins and the second fins are on...
Fin-last FinFET and methods of forming same
Embodiments of the present disclosure are a FinFET device, and methods of forming a FinFET device. An embodiment is a method for forming a FinFET device, the...
CMOS transistor, semiconductor device including the transistor, and
semiconductor module including the device
Provided are a CMOS transistor, a semiconductor device having the transistor, and a semiconductor module having the device. The CMOS transistor may include...
P-N bimodal conduction resurf LDMOS
RESURF-based dual-gate p-n bimodal conduction laterally diffused metal oxide semiconductors (LDMOS). In an illustrative embodiment, a p-type source is...
Single diffusion break structure and cuts later method of making
A method of forming a single diffusion break includes etching rows of fins into a substrate of a structure from a patterned fin hardmask, the remaining fin...
Fin-FET replacement metal gate structure and method of manufacturing the
A method of forming fins and the resulting fin-shaped field effect transistors (finFET) are provided. Embodiments include forming silicon (Si) fins over a...
ESD clamp with auto biasing under high injection conditions
In a dual direction ESD protection circuit formed from multiple base-emitter fingers that include a SiGe base region, and a common sub-collector region, the I-V...
A semiconductor device that includes transistors with different threshold voltages is provided. Alternatively, a semiconductor device including a plurality of...
A semiconductor device includes a semiconductor substrate; and a temperature sense diode fixed on the semiconductor substrate. The temperature sense diode...
Power semiconductor device having trench gate type IGBT and diode regions
Switching loss is reduced. A first surface of a semiconductor substrate has a portion included in an IGBT region and a portion included in a diode region....
Field effect transistor with integrated Zener diode
One or more Zener diodes and a field effect transistor having a drain connected in series with the one or more Zener diodes are integrally formed by a plurality...
Method of forming a high electron mobility semiconductor device and
In one embodiment, a method of forming a semiconductor device can comprise; forming a HEM device on a semiconductor substrate. The semiconductor substrate...
Normally-off junction field-effect transistors and application to
A junction field-effect transistor (JFET) with a gate region that includes two separate sub-regions having material of different conductivity types and/or a...
Manufacturing method of semiconductor device
A manufacturing method of a semiconductor device includes: depositing a thin film semiconductor layer on a semiconductor substrate with an insulating film...
Semiconductor isolation structure
The invention relates to a semiconductor isolation structure. More particularly, the present invention relates to a semiconductor isolation structure suitable...
Integrated circuit and method for fabricating an integrated circuit
equipped with a temperature probe
This integrated circuit comprises: a substrate, a first electrical conductor comprising a first end, the first electrical conductor being electrically...
A semiconductor device which is capable of operating at an operation frequency "f", includes a substrate, a first element unit and a second element unit. The...