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Patent # Description
US-9,542,329 System and method for managing an object cache
In order to optimize efficiency of deserialization, a serialization cache is maintained at an object server. The serialization cache is maintained in...
US-9,542,328 Dynamically controlling a file system write cache
Methods, computing systems and computer program products implement embodiments of the present invention that include initializing, by a processor executing a...
US-9,542,327 Selective mirroring in caches for logical volumes
Methods and structure for selective cache mirroring. One embodiment includes a control unit and a memory. The memory is able to store indexing information for a...
US-9,542,326 Managing tiering in cache-based systems
A method and a system for use in managing tiering in a cache-based system is disclosed wherein the cache-based system comprises a first data storage tier and a...
US-9,542,325 Adjustable over-restrictive cache locking limit for improved overall performance
Disclosed is a multi-core processor that includes a processor core, a graphics core, and a cache controller. The cache controller receives a first request from...
US-9,542,324 File associated pinning
Systems and methods are disclosed for intelligent data caching behavior. In an embodiment, a method may comprise receiving a read or write command for specific...
US-9,542,323 Address re-ordering mechanism for efficient pre-fetch training in an out-of-order processor
A computing system includes: an instruction dispatch module configured to receive a program instruction; an address reordering module, coupled to the...
US-9,542,322 Data access management in a hybrid memory server
Once or more embodiments manage access to data by accelerator systems in an out-of-core processing environment. In one embodiment, a request from an accelerator...
US-9,542,321 Slice-based random access buffer for data interleaving
The disclosure is directed to a system and method for interleaving data utilizing a random access buffer that includes a plurality of independently accessible...
US-9,542,320 Multi-node cache coherency with input output virtualization
Systems and methods maintain cache coherency between storage controllers using input/output virtualization. In one embodiment, a primary storage controller...
US-9,542,319 Method and system for efficient communication and command system for deferred operation
A method and system for efficiently executing a delegate of a program by a processor coupled to an external memory. A payload including state data or command...
US-9,542,318 Temporary cache memory eviction
A method for managing a cache memory of a storage system, the method may include storing a first retrieval metadata of a first data that is cached in the cache...
US-9,542,317 System and a method for data processing with management of a cache consistency in a network of processors with...
A system for data processing with management of a cache consistency in a network of processors including cache memories, the network including plural nodes for...
US-9,542,316 System and method for adaptation of coherence models between agents
A system and method are disclosed for multiple coherent caches supporting agents that use different, incompatible coherence models. Compatibility is implemented...
US-9,542,315 Tiled storage array with systolic move-to-front organization
A tiled storage array provides reduction in access latency for frequently-accessed values by re-organizing to always move a requested value to a front-most...
US-9,542,314 Cache mobility
A method and system of selecting and migrating relevant data from among data associated with a workload of a virtual machine and stored in source storage cache...
US-9,542,313 Parallel computer system, control method of parallel computer system, information processing device, arithmetic...
A parallel computer system includes information processing devices, each of the information processing devices including a communication control device that...
US-9,542,312 Selectively programming data in multi-level cell memory
Devices, systems, methods, and other embodiments associated with accessing memory are described. In one embodiment, a method detects that a power quality...
US-9,542,311 Programming mode for multi-layer storage flash memory array and switching control method thereof
The present invention relates to a programming mode for improving the reliability of a multi-layer storage flash memory device in a semiconductor storage field....
US-9,542,310 File server node with non-volatile memory processing module coupled to cluster file server node
Apparatus includes a file server node having (i) a first interface operable to communicate with a network and receiving a network request via network, (ii) a...
US-9,542,309 Relocating data based on matching address sequences
A data storage device includes a non-volatile memory and a controller. The controller is configured to store a first sequence of addresses based on a first...
US-9,542,308 Electronic device that completes execution of task immediately, method for managing memory, and recording medium
An electronic device includes a memory, a first-region allocating unit, and a second-region allocating unit. The first-region allocating unit allocates first...
US-9,542,307 Shiftable memory defragmentation
Shiftable memory that supports defragmentation includes a memory having built-in shifting capability, and a memory defragmenter to shift a page of data...
US-9,542,306 Dynamic storage device provisioning
A method or system for allocating the storage space of a storage medium into a permanently allocated media cache storage region; a dynamically mapped media...
US-9,542,305 Impedance matching for high speed signaling in memory system
Impedance matching circuitry is positioned on a signal line intermediate the terminals of the signal line in an integrated circuit. The impedance matching...
US-9,542,304 Automated operating system installation
Technologies are provided herein for automated operating system installation. Through the concepts and technologies presented herein, the process of installing...
US-9,542,303 System and method for reversibility categories and characteristics of computer application functions
Disclosed embodiments provide a system, machine-readable medium, and a method that may test computer application functions. A system provides for testing a...
US-9,542,302 System and method for remote debugging of an application in an image forming apparatus over a network
A system includes an intervening server, an information processing apparatus, and an image forming apparatus. The information processing apparatus i) sends...
US-9,542,301 Testing code response to injected processing errors
More robust testing of computer module responses to processing errors using a flexible, lightweight solution that does not alter the computer module. Through...
US-9,542,300 System and method for tracking callback functions for error identification
A system and method for tracking callback functions for error identification is provided. Prior to a function calling a callback function, it records...
US-9,542,299 Processing core data produced by a computer process
A method, apparatus, computer program and computer program product for processing core data produced by a computer process to identify data relevant to the...
US-9,542,298 Reducing resource overhead in verbose trace using recursive object pruning prior to string serialization
Embodiments describe techniques for reducing resource overhead in verbose trace operations by recursively pruning object data prior to string serialization....
US-9,542,297 Recording GUI data
A system for recording the interaction of a computer program via graphical user interface (GUI) is disclosed in which one or more event queues are monitored and...
US-9,542,296 Disk replacement using a predictive statistical model
In a provider network, attributes of one of a plurality of storage devices of the provider network are identified for failure monitoring. Based on a failure...
US-9,542,295 Method to apply perturbation for resource bottleneck detection and capacity planning
Inducing perturbation by varying a supply amount of the resource type in the system and measuring performance of the software entity at multiple variation...
US-9,542,294 Method to apply perturbation for resource bottleneck detection and capacity planning
Inducing perturbation by varying a supply amount of the resource type in the system and measuring performance of the software entity at multiple variation...
US-9,542,293 Method and system for collecting and pre-processing quality of service data in a storage system
Methods and systems for collecting and processing quality of service (QOS) data are provided. A collection module receives the QOS data from a storage operating...
US-9,542,292 Designing operations interface to enhance situational awareness
Enhancing situational awareness in operations management includes: generating a user interface incorporating multiple display interfaces; receiving event data...
US-9,542,291 Self-monitoring event-based system and method
Certain example embodiments relate to an event-based system configured for self-monitoring. The event-based system includes a complex event processing (CEP)...
US-9,542,290 Replicating test case data into a cache with non-naturally aligned data boundaries
Data is replicated into a memory cache with non-naturally aligned data boundaries to reduce the time needed to generate test cases for testing a processor....
US-9,542,289 Computer node testing
A computer node comprises dual hard drives. A method of testing the computer node comprises performing a test of the first hard drive, waiting a specific time...
US-9,542,288 Diagnosis for a server motherboard
A server motherboard diagnosis method, system, and related circuit system. A management module of the server motherboard and peripheral devices managed by the...
US-9,542,287 Systems and methods for error injection in data storage systems
Embodiments of the solid-state storage system provided herein are configured to perform improved mechanisms for testing of error recovery of solid state storage...
US-9,542,286 Failure logging mechanism to reduce garbage collection time in partially reused bad blocks
A memory system logs failures to optimize garbage collection in partial bad blocks that are reused in non-volatile memory. A failure in a primary block may be...
US-9,542,285 Memory device, storage method and control device
A memory device includes a storage unit in which a plurality of semiconductor chips each comprising a plurality of memory blocks respectively arranged in a...
US-9,542,284 Buffered automated flash controller connected directly to processor memory bus
A mechanism is provided for direct memory access in a storage device. Responsive to the buffered flash memory module receiving from a memory bus of a processor...
US-9,542,283 Preventing removal of hot-swappable components
One embodiment provides an apparatus, including: at least one hot-swappable component; at least one engagement device, wherein the engagement device selectively...
US-9,542,282 Methods for session failover in OS (operating system) level and systems using the same
The invention introduces a method for session failover in OS (Operating System) level, which contains at least the following steps. A VM (Virtual Machine) OS is...
US-9,542,281 Systems and methods for providing snapshots of applications to remote locations with minimal performance impact
Systems and methods herein obtain snapshots of one or more applications, while having minimal impact on performance of the applications. Embodiments may involve...
US-9,542,280 Optimized recovery
A method, article of manufacture, and apparatus for restoring data. In some embodiments, this includes determining an object to be recovered, determining a...
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