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Patent # Description
US-9,559,080 Integrated circuit device packages and methods for manufacturing integrated circuit device packages
An integrated circuit device package may include a flexible substrate having a first wiring, an integrated circuit device having a second wiring, a flexible...
US-9,559,079 Semiconductor stack packages
A semiconductor stack package includes a printed circuit board (PCB), a first semiconductor chip, and a second semiconductor chip. The first and second...
US-9,559,078 Electronic component
An electronic component includes an electrically conductive carrier. The electrically conductive carrier includes a carrier surface and a semiconductor chip...
US-9,559,077 Die attachment for packaged semiconductor device
A method for forming a packaged semiconductor device includes attaching a first major surface of a semiconductor die to a plurality of protrusions extending...
US-9,559,076 Package having substrate with embedded metal trace overlapped by landing pad
An embodiment package includes a conductive pillar mounted on an integrated circuit chip, the conductive pillar having a stepper shape, a metal trace partially...
US-9,559,075 Semiconductor product with interlocking metal-to-metal bonds and method for manufacturing thereof
A structure and method for performing metal-to-metal bonding in an electrical device. For example and without limitation, various aspects of this disclosure...
US-9,559,073 Base film and pressure-sensitive adhesive sheet provided therewith
To prevent bumps on the circuit side of a bump-bearing wafer from getting crushed when grinding the back side of said wafer while protecting the circuit side...
US-9,559,072 Metal bump joint structure
A structure comprises a first semiconductor chip with a first metal bump and a second semiconductor chip with a second metal bump. The structure further...
US-9,559,071 Mechanisms for forming hybrid bonding structures with elongated bumps
Embodiments of mechanisms for forming a package structure are provided. The package structure includes a semiconductor die and a substrate. The package...
US-9,559,070 Post-passivation interconnect structure and method of forming same
A semiconductor device including a dielectric layer formed on the surface of a post-passivation interconnect (PPI) structures. A polymer layer is formed on the...
US-9,559,069 Semiconductor device, integrated circuit structure using the same, and manufacturing method thereof
A semiconductor device includes a substrate, a semiconductor structure, a metal pad, and a stress releasing material. The semiconductor structure is disposed on...
US-9,559,068 Wafer scale package for high power devices
A semiconductor device package is formed of DBC in which thinned MOSgated and/or diode die are soldered to the bottom of an etched depression in the upper...
US-9,559,067 Methods and apparatus of guard rings for wafer-level-packaging
A method of forming a semiconductor device includes forming a passivation layer on top of a guard ring and an active area of a circuit device, forming a...
US-9,559,066 Systems and methods for detecting and preventing optical attacks
The present disclosure outlines various systems and methods for detecting an optical fault injection within an electronic device and/or preventing the optical...
US-9,559,065 Semiconductor arrangement, method for producing a semiconductor module, method for producing a semiconductor...
A semiconductor arrangement includes upper and lower contact plates and basic chip assemblies. Each chip assembly has a semiconductor chip having a...
US-9,559,064 Warpage control in package-on-package structures
A package includes a bottom substrate and a bottom die over and bonded to the bottom substrate. A metal-particle-containing compound material is overlying a top...
US-9,559,063 Semiconductor device having crack-resisting ring structure and manufacturing method thereof
A semiconductor device includes an interlayer insulating layer disposed over a semiconductor substrate, and including a plurality of wiring layers; a seal ring...
US-9,559,061 Substrate-to-carrier adhesion without mechanical adhesion between abutting surfaces thereof
Wafer to carrier adhesion without mechanical adhesion for formation of an IC. In such formation, an apparatus has a bottom surface of a substrate abutting a top...
US-9,559,060 Method of forming stacked trench contacts and structures formed thereby
Methods and associated structures of forming a microelectronic device are described. Those methods may include forming a structure comprising a first contact...
US-9,559,059 Methods of forming an improved via to contact interface by selective formation of a conductive capping layer
One illustrative method disclosed herein includes, among other things, forming an opening in a layer of insulating material so as to thereby expose at least a...
US-9,559,058 Semiconductor device and method for manufacturing the same
A semiconductor device includes a semiconductor substrate, an oxygen-containing insulating film disposed above the above-described semiconductor substrate, a...
US-9,559,057 Semiconductor device and method for manufacturing the same
According to one embodiment, a semiconductor device comprises a first semiconductor region of a first conductivity type, a second semiconductor region of a...
US-9,559,056 Electronic component
In an embodiment, an electronic component includes a dielectric core layer having a first major surface, a semiconductor die embedded in the dielectric core...
US-9,559,055 Semiconductor device
A semiconductor device includes a fuse element that can be cut and removed by laser irradiation. The fuse element has a large width portion having a large...
US-9,559,054 Repairing line structure and circuit repairing method using same
The present invention discloses a repairing line structure for repairing a breakage at a crossing point of electric wires extending along different directions...
US-9,559,053 Compact vertical inductors extending in vertical planes
A device includes a substrate, and a vertical inductor over the substrate. The vertical inductor includes a plurality of parts formed of metal, wherein each of...
US-9,559,052 Semiconductor device and manufacturing method of the same
A semiconductor device includes an interlayer insulating film INS2, adjacent Cu wirings M1W formed in the interlayer insulating film INS2, and an insulating...
US-9,559,051 Method for manufacturing in a semiconductor device a low resistance via without a bottom liner
A method for depositing a conductor in the via opening electronic structure removes the via bottom liner so that the conductor deposited in the via opening...
US-9,559,050 Semiconductor device and manufacturing method thereof
A method for manufacturing a semiconductor device includes forming a first conductor pattern and a second conductor pattern running side by side with each...
US-9,559,049 Memory device and method of manufacturing the same
Provided is a memory device including a plurality of first conductive line layers, a plurality of support structures, and a charge storage layer. Each of the...
US-9,559,048 Circuit carrier and method for producing a circuit carrier
A circuit carrier is disclosed that includes a base body having two flat sides and a plurality of narrow sides, a first conductor track applied to a first flat...
US-9,559,047 Passive component as thermal capacitance and heat sink
Representative implementations of devices and techniques provide improved thermal performance of a chip die disposed within a layered printed circuit board...
US-9,559,046 Semiconductor device and method of forming a fan-in package-on-package structure using through silicon vias
A semiconductor device is made by providing a first semiconductor die having a plurality of contact pads formed over a first surface of the first semiconductor...
US-9,559,045 Package structure and method for manufacturing the same
Provided is a package structure including a circuit board, a plurality of first contact pads, a plurality of metal pillars and at least one chip. The first...
US-9,559,044 Package with solder regions aligned to recesses
A method includes forming a passivation layer over a portion of a metal pad, forming a polymer layer over the passivation layer, and exposing the polymer layer...
US-9,559,043 Multi-level leadframe with interconnect areas for soldering conductive bumps, multi-level package assembly and...
A leadframe, a package assembly and methods for manufacturing the same are disclosed. A plurality of electronic devices are stacked in a plurality of levels in...
US-9,559,042 Semiconductor device
A semiconductor device includes an insulating substrate having an insulating plate formed of ceramic and a circuit plate fixed on a main face of the insulating...
US-9,559,041 Semiconductor device and process for fabricating the same
A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring...
US-9,559,040 Double-sided segmented line architecture in 3D integration
Embodiments of the present invention relate generally to electronic components such as semiconductor wafers and more particularly, to a double-sided...
US-9,559,039 Semiconductor device and method of using substrate having base and conductive posts to form vertical...
A semiconductor device has a substrate including a base and a plurality of conductive posts extending from the base. The substrate can be a wafer-shape, panel,...
US-9,559,038 Package for a semiconductor device
A package for a semiconductor device or circuit comprises a semiconductor switch module having a metallic base on an exterior side and metallic pads. A metallic...
US-9,559,037 Package integrated synthetic jet device
Embodiments include a synthetic jet device formed within layers of a package substrate, such as to provide a controlled airflow for sensing or cooling...
US-9,559,036 Integrated circuit package with plated heat spreader
An integrated circuit package may include an integrated circuit die with lower and upper surfaces. The integrated circuit die is mounted on a package substrate....
US-9,559,035 Semiconductor device
A semiconductor device includes a laminated substrate having circuit boards, an insulating plate, and a metal plate laminated, and warped convexly to the...
US-9,559,034 Package for high-power semiconductor devices
Methods and apparatuses for forming a package for high-power semiconductor devices are disclosed herein. A package may include a plurality of distinct thermal...
US-9,559,033 Semiconductor device
A semiconductor device includes a substrate having an edge, a semiconductor layer provided on a substrate, an electrode pad provided on the semiconductor layer,...
US-9,559,032 Method for forming MOS device passivation layer and MOS device
The present invention provides a method of forming a passivation layer of a MOS device, and a MOS device. The method of forming a passivation layer of a MOS...
US-9,559,031 Apparatus and method for fabricating epi wafer and epi wafer
A method for fabricating an epi wafer according to the embodiment comprises depositing an epi layer on a wafer in a first chamber; transferring the wafer to a...
US-9,559,030 Electronic component and method of manufacturing the same
An electronic component has a circuit board with a main surface, a chip having a sensor facing the main surface, bump electrodes disposed between the main...
US-9,559,029 Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied...
A semiconductor device has a protective layer formed over an active surface of a semiconductor wafer. The semiconductor die with pre-applied protective layer...
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