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Patent # Description
US-9,558,876 Halbach array of electromagnets with substantially contiguous vertical and horizontal cores
Electromagnetic Halbach array device with substantially contiguous vertical and horizontal cores. The device is equipped with horizontal cores having...
US-9,558,875 Electronic device with signal line routing to minimize vibrations
An electronic device may have a source of magnetic field such as a magnet that produces a static magnetic field. A flexible printed circuit may have a flexible...
US-9,558,874 Sintered NdFeB magnet and method for manufacturing the same
Disclosed is a sintered NdFeB magnet having high coercivity (H.sub.cJ) a high maximum energy product ((BH).sub.max) and a high squareness ratio (SQ) even when...
US-9,558,873 Method for manufacturing superconducting wire, and superconducting wire
A method for manufacturing a superconducting wire material in which the superconducting current is not saturated even when a superconducting layer is made into...
US-9,558,872 R-T-B rare earth sintered magnet, alloy for R-T-B rare earth sintered magnet, and method of manufacturing the same
An R-T-B rare earth sintered magnet contains R which represents a rare earth element; T which represents a transition metal essentially containing Fe; a metal...
US-9,558,871 Fe-based amorphous alloy and dust core made using Fe-based amorphous alloy powder
An Fe-based amorphous alloy of the present invention has a composition represented by formula (Fe.sub.100-a-b-c-d-eCr.sub.aP.sub.bC.sub.cB.sub.dSi.sub.e (a, b,...
US-9,558,870 Dual resolution potentiometer
An electrical assembly including a conductor arrangement and a dual resolution potentiometer electrically connected to the conductor arrangement. The dual...
US-9,558,869 Negative differential resistance device
Apparatus and methods related to negative differential resistance (NDR) are provided. An NDR device includes a spaced pair of electrodes and at least two...
US-9,558,868 Use of hydrophobic epoxide resin system for encapsulation of a instrument transformer
Disclosed is the use of a curable composition for padding-free encapsulation of instrument transformers comprising (a) a cycloaliphatic epoxy resin, (b) a...
US-9,558,867 Flame retardant thermoplastic elastomers
A flame-retardant thermoplastic elastomer compound is disclosed having polyphenylene ether, a hydrogenated styrene block copolymer, at least one solid...
US-9,558,866 Wire harness
A wire harness including a metal pipe into which an electrical wire is inserted, a metal braided section that covers the electrical wire drawn out from the...
US-9,558,865 Cable with resin molded body and method of manufacturing the same
A method of manufacturing a cable with resin molded body, wherein the cable with resin molded body includes a cable and a resin molded body formed by resin...
US-9,558,864 Multi-drive common control bus connector system
An electrical bus assembly includes a frame and a plurality of bus bar carriers connected to the frame. The bus bars are supported by the bus bar carriers in...
US-9,558,863 Electrically conductive polymers with enhanced conductivity
An electrically conductive polymer linked to conductive nanoparticle is provided. The conductive polymer can include conductive monomers and one or more...
US-9,558,862 Conductive polymer composition, coated article having antistatic film formed from the composition, and...
The present invention is a conductive polymer composition containing a .pi.-conjugated conductive polymer, a polyanion, and a gemini surfactant. There can be...
US-9,558,861 Block copolymers that disperse nanofillers in water
The invention relates to novel block copolymers that enable a good dispersion of nanofillers in water and also to a dispersion of nanofillers obtained owing to...
US-9,558,860 Graphene-enhanced anode particulates for lithium ion batteries
A nano graphene-enhanced particulate for use as a lithium-ion battery anode active material, wherein the particulate is formed of a single sheet of graphene or...
US-9,558,859 Multilayer substrate and method for manufacturing the same
The invention provides a slip layer substrate which can reduce the thermal residual stresses between components induced by their mismatch of thermal expansion,...
US-9,558,858 System and method for imaging a sample with a laser sustained plasma illumination output
The inspection of a sample with VUV light from a laser sustained plasma includes generating pumping illumination including a first selected wavelength, or range...
US-9,558,857 Systems and methods for dry storage and/or transport of consolidated nuclear spent fuel rods
In one embodiment, a system and method for dry storage comprises removing spent fuel rods from their fuel rod assemblies and placing the freed fuel rods in a...
US-9,558,856 Control system for plant
In a control system for a plant controlling a plant such as a nuclear power plant 1 with use of a plurality of digital control devices 41, the plurality of...
US-9,558,855 Pressurized water reactor with upper plenum including cross-flow blocking weir
A pressurized water reactor (PWR) comprises: a nuclear core comprising a fissile material; a cylindrical pressure vessel having a vertically oriented cylinder...
US-9,558,854 Systems and methods for providing override control for a feedwater pump recirculation valve
Systems and methods for providing override control for a feedwater pump recirculation valve are provided. According to one embodiment, a system may include a...
US-9,558,853 Porous UO.sub.2 sintered pellets and method for fabricating porous UO.sub.2 sintered pellets and electrolytic...
A method for fabricating porous UO.sub.2 sintered pellets to be fed into the electrolytic reduction process for the purpose of metallic nuclear fuel recovery is...
US-9,558,852 Method and apparatus for defect repair in NAND memory device
System and method of selecting defective columns in NAND memory devices for repair. After locating the defective blocks and defective columns in a NAND memory...
US-9,558,851 Soft post package repair of memory devices
Apparatus and methods for soft post package repair are disclosed. One such apparatus can include memory cells in a package, volatile memory configured to store...
US-9,558,850 Efficient calibration of a data eye for memory devices
A system and method for efficient data eye training reduces the time and resources spent calibrating one or more memory devices. A temporal calibration...
US-9,558,849 Methods for memory interface calibration
Integrated circuits with memory interface circuitry may be provided. Prior to calibration, a number of samples may be determined by computing probability...
US-9,558,848 Testing storage device power circuitry
The present invention extends to methods, systems, and computer program products for testing storage device power circuitry. A storage device controller...
US-9,558,847 Defect logging in nonvolatile memory
A method of operating a nonvolatile memory block includes reading data from physical units in the block and determining individual error rates for data from the...
US-9,558,846 Feedback validation of arbitrary non-volatile memory data
An integrated circuit and method of performing a reliability screen of an electrically programmable non-volatile memory array in the integrated circuit. At a...
US-9,558,845 Sampling network and clocking scheme for a switched-capacitor integrator
Certain aspects of the present disclosure generally relate to a sampling network of a switched-capacitor integrator and a clocking scheme associated therewith,...
US-9,558,844 Identifying stacked dice
Various embodiments comprise apparatuses to assign unique device identifier values to addressable devices in a stacked package. In one embodiment, an apparatus...
US-9,558,843 Shift register unit, gate driving circuit, and display device comprising the same
A shift register unit, a gate driving circuit, and a display device are disclosed. The shift register unit comprising: a pull-up module for pulling up level...
US-9,558,842 Discrete three-dimensional one-time-programmable memory
The present invention discloses a discrete three-dimensional one-time-programmable memory (3D-OTP). It comprises at least a 3D-array die and at least a...
US-9,558,841 Generating stabilized output signals during fuse read operations
A circuit includes a fuse cell, a sense circuit and an output control circuit. The fuse cell includes an electrical fuse. The sense circuit is electrically...
US-9,558,840 Semiconductor device
A semiconductor device includes a memory circuit, a first FIFO, a second FIFO and an input/output circuit. The memory circuit outputs data. The first FIFO...
US-9,558,839 Power fail saving modes in solid state drive with MLC memory
A solid state drive has a power failure savings mode that permits a reduction in holdup time for a temporary backup power supply. The solid state drive stores...
US-9,558,838 Semiconductor device for masking data stored in twin cell and outputting masked data
A memory array includes a plurality of twin cells, each of the twin cells composed of a first storage element and a second storage element configured to hold...
US-9,558,837 Nonvolatile semiconductor memory device
A semiconductor memory device includes a memory cell array, a sense amplifier, a register, a controller. The memory cell array includes a memory cell. The sense...
US-9,558,836 Compact high speed sense amplifier for non-volatile memory with reduced layout area and power consumption
A compact and versatile high speed sense amplifier suitable for use in non-volatile memory circuits is presented. The sense amp circuit is connected to first...
US-9,558,835 Semiconductor device and operating method thereof
Disclosed are a semiconductor device and an operating method thereof. The semiconductor device includes a plurality of memory blocks including cell strings...
US-9,558,834 Nonvolatile memory device and an erasing method thereof
An erase method of a nonvolatile memory device includes applying an erase voltage to a substrate; sensing a temperature of a memory cell array; setting a delay...
US-9,558,833 Write controlling method for memory
A three dimensional stacked nonvolatile semiconductor memory according to an example of the present invention includes a memory cell array comprised of first...
US-9,558,832 Semiconductor device including boosted voltage supply circuit for supplying boosted voltage to memory array
To maintain constant an output voltage of a boosted voltage circuit even when a program current of a nonvolatile memory increases; in a boosted voltage circuit...
US-9,558,831 Non-volatile memory programming
Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method includes applying voltages to data lines...
US-9,558,830 Semiconductor device
The number of level shifters is reduced in a decode circuit of a nonvolatile memory. A semiconductor device is configured with an electrically rewritable...
US-9,558,829 System having a semiconductor integrated circuit device
A semiconductor memory apparatus including a latch unit configured to be driven in response to activation of a reset selection signal and resetting a first node...
US-9,558,828 Semiconductor memory device including a NAND string
A semiconductor memory device includes a first NAND string and a second NAND string are connected to a bit line. One of the first and second NAND strings is...
US-9,558,827 Semiconductor memory device having memory strings including drain-side and source-side memory cells connected...
A semiconductor memory device is provided. The semiconductor memory device includes memory strings including drain-side memory cells connected between a bit...
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