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Patent # Description
US-9,558,826 Semiconductor device and method of driving semiconductor device
A first potential and a second potential lower than the first potential are applied to a first end of a memory gate electrode part of the nonvolatile memory and...
US-9,558,825 System and method to discover and encode indirect associations in associative memory
Described is a system for detecting and encoding indirect associations in associative memory. The system receives a data storage input in a content-addressable...
US-9,558,824 Semiconductor device and operating method thereof
To improve information retention resistance of a resistance change memory which requires high information retention resistance. On the assumption that a special...
US-9,558,823 Resistance drift recovery method for MLC PCM
A method is provided for operating a memory device including an array of memory cells including programmable resistive memory elements. Memory cells in the...
US-9,558,822 Resistive memory device and method of operating the resistive memory device
In operating a resistive memory device including a number of memory cells, a write pulse is applied to each of the plurality of memory cells such that each of...
US-9,558,821 Resistive memory device and method of operating the same
Provided are a resistive memory device and a method of the resistive memory device. The method of operating the resistive memory device includes performing a...
US-9,558,820 Resistive crosspoint memory array sensing
A method includes applying a voltage bump across a combined memory device comprising a volatile selector switch and a nonvolatile switch, in which the voltage...
US-9,558,819 Method, system and device for non-volatile memory device operation
Disclosed are methods, systems and devices for operation of non-volatile memory devices. In one aspect, a non-volatile memory device may be placed in any one of...
US-9,558,818 Memory and memory managing method
A method for managing memory includes setting a state of a first memory cell to a first state representing a first data and setting a state of a second memory...
US-9,558,817 Conditioning phase change memory cells
A method for conditioning at least one Phase Change Memory, PCM, cell. The PCM cell is characterized by a number of pre-defined characteristics or properties....
US-9,558,816 Method for regulating reading voltage of NAND flash memory device
A method of adjusting read voltages for a NAND flash memory device includes an operation of reading first page data from a first page corresponding to a paired...
US-9,558,815 Semiconductor storage device
A semiconductor storage device according to an embodiment includes a memory cell array including a plurality of memory cells. A plurality of word lines are...
US-9,558,814 Hybrid analog and digital memory device
A memory cell including a floating gate transistor including a floating gate, and an analog sensor element adjacent to the floating gate, where an electrical...
US-9,558,813 Method of operating incrementally programmable non-volatile memory
An array of programmable non-volatile devices, such as a nominal OTP cell, is operated such that a V.sub.t representing a particular binary logic state is...
US-9,558,812 SRAM multi-cell operations
A multi-memory cell operator includes a non-destructive memory array, an activation unit and a multiple column decoder. The non-destructive memory array has...
US-9,558,811 Disturb-proof static RAM cells
A circuit includes a latch circuit, a buffer transistor having a control terminal coupled to a first output of the latch, a first write transistor having a...
US-9,558,810 Semiconductor device
A semiconductor device capable of reconfiguration, including a plurality of logic units which are connected to each other by an address line or a data line,...
US-9,558,809 Layout of static random access memory array
A column of a static random access memory (SRAM) array includes a first subarray including a first plurality of SRAM cells and a second subarray including a...
US-9,558,808 DRAM security erase
A memory includes a DRAM array having memory cells, wordlines and bitlines coupled to the memory cells, and sense amplifiers. The memory can be configured to...
US-9,558,807 Apparatuses and systems for increasing a speed of removal of data stored in a memory cell
Embodiments include apparatuses, methods, and systems including a circuit which may increase a speed of removal of data stored in a memory cell. In embodiments,...
US-9,558,806 Electronic device
The number of terminals included in a semiconductor device which is included in an electronic device is reduced. The electronic device includes: a first...
US-9,558,805 Memory modules and memory systems
A memory module includes a plurality of memory devices and a buffer chip. The buffer chip manages the memory devices. The buffer chip includes a refresh control...
US-9,558,804 Charge storage ferroelectric memory hybrid and erase scheme
A technique for erasing a ferroelectric field effect transistor (FeFET) memory circuit comprising a plurality memory cells comprising FeFETs is described. Each...
US-9,558,803 Fixed voltage sensing in a memory device
Methods for sensing ferroelectric memory devices and apparatuses using the same have been disclosed. One such apparatus includes a ferroelectric memory cell...
US-9,558,802 Fast programming of magnetic random access memory (MRAM)
A method of programming an MTJ includes selecting an MTJ that is coupled to an access transistor at the drain of the access transistor. The gate of the access...
US-9,558,801 Data holding circuit including latch circuit and storing circuit having MTJ elements and data recovery method
A data holding circuit includes: a latch circuit having a first terminal and a second terminal, a logical value held at the first terminal being changed...
US-9,558,800 Non-volatile random access memory (NVRAM)
A non-volatile memory device includes an array of non-volatile memory cells. A memory cell in the array of memory cells includes a first resistive element...
US-9,558,799 Timing violation handling in a synchronous interface memory
A memory device includes an operation having a phase to provide an upper row address from a row address buffer, a phase to combine the upper row address with a...
US-9,558,798 Receiving circuit, memory interface circuit, and receiving method
A receiving circuit that receives differential data strobe signals between a controller and a memory, the receiving circuit includes: a first receiver that...
US-9,558,797 Method and apparatus for controlling current in an array cell
A method and an apparatus for controlling current in an array cell is disclosed. The method includes applying a supply voltage to a first access point of a...
US-9,558,796 Systems and methods for maintaining memory access coherency in embedded memory blocks
Enhanced memory circuits are described that maintain coherency between concurrent memory reads and writes in a pipelined memory architecture. The described...
US-9,558,794 Semiconductor memory device including peripheral circuit for performing program and read opeartions and...
A semiconductor memory device includes a memory cell array including a plurality of pages; a peripheral circuit suitable for performing a program operation and...
US-9,558,792 Voltage generating circuit
A circuit includes a first transistor of a first type, a second transistor of a second type, a sense amplifier, a first data line coupled with a first terminal...
US-9,558,791 Three-dimensional static random access memory device structures
Systems and methods are provided for fabricating a static random access memory (SRAM) cell in a multi-layer semiconductor device structure. An example SRAM...
US-9,558,790 Hermetic sealing with high-speed transmission for hard disk drive
Embodiments disclosed herein generally relate to hermetic electrical connectors used in hard disk drives. The hermetic electrical connector includes a barrier...
US-9,558,789 Storage device sled and assembly method thereof
An improved storage device sled is provided. The storage device sled includes first and second portions, each of which includes a threaded fastener, a...
US-9,558,788 Systems and methods of providing user interface features for a media service
In an exemplary method, a computer-implemented media service system provides a graphical user interface view associated with a first functional area of the...
US-9,558,787 Media application backgrounding
A media application is disclosed. The media application provides a playback of a media item that includes a video portion and an audio portion. The media...
US-9,558,786 Systems, methods, and computer program products for multiple aspect ratio automated simulcast production
A system, method, and computer program product for producing a show. In an embodiment, the invention is directed to a production system having a first...
US-9,558,785 Layered audio coding and transmission
Embodiments of systems and methods are described for generating layered audio such that computing devices can request a variable amount of data based on...
US-9,558,784 Intelligent video navigation techniques
Automatic replay or skip ahead functionality can be configured to intelligently navigate to a portion of a video a user desires to view. The context at which a...
US-9,558,783 System and method for displaying tape drive utilization and performance data
A system includes a utilization calculation module, a performance calculation module, an input module and an output module. The input module to receive a...
US-9,558,782 Partial reverse concatenation for data storage devices using composite codes
In one embodiment, a data storage system includes a write channel for writing data to a storage medium, the write channel configured to utilize a partial...
US-9,558,781 Method for selecting individual discs from tightly spaced array of optical discs
A cylindrical array of tightly spaced optical discs are each positioned vertically on edge to form a horizontal stack. Lifting a subset of optical discs enables...
US-9,558,780 Library device and accessor device
A library device includes: a housing having a substantially rectangular parallelepiped shape, the housing having a first surface and a second surface differing...
US-9,558,779 System on chip (SoC) based on phase transition and/or phase change material
System on chips (SoCs) of a microprocessor electrically connected with electronic memory devices and/or optically connected with a optical memory device are...
US-9,558,778 Lubricant compound for magnetic disk and magnetic disk
A lubricant compound is contained in a lubrication layer of a magnetic disk in which at least a magnetic layer, a protective layer, and a lubrication layer are...
US-9,558,777 Heat assisted magnetic recording (HAMR) media having a highly ordered crystalline structure
According to one embodiment, a magnetic recording medium includes: a substrate, a seed layer positioned above the substrate, and a magnetic recording layer...
US-9,558,776 Durable coating for magnetic tape recording media
A product such as a magnetic recording tape, according to one embodiment, includes a flexible magnetic media having a substrate, a magnetic recording layer...
US-9,558,775 Laser diode submount/slider interface with reduced thermal resistance
An apparatus comprises a slider of a magnetic recording head, a submount, and an interface defined between the slider and the submount. A laser diode is...
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