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Patent # Description
US-9,571,091 Methods for overdriving a base current of an emitter switched bipolar junction transistor and corresponding...
An emitter switched bipolar transistor circuit includes a bipolar junction transistor (BJT) having a collector coupled to an output terminal, a metal oxide...
US-9,571,090 Method for compensating thin film transistor threshold voltage drift
A method for compensating a threshold voltage drift of a thin film transistor comprises: controlling a drain and a gate of the thin film transistor to have a...
US-9,571,089 Built-in gate driver
A built-in gate driver includes a shift register provided in a non-display area of a panel, and configured to include first to gth stages outputting a scan...
US-9,571,088 Semiconductor device
A semiconductor device includes a transistor; a diode configured to be connected in reverse-parallel with the transistor; a sense transistor configured to...
US-9,571,087 Method of operating a reverse conducting IGBT
According to an embodiment of a method, a semiconductor device is operated in a reverse biased unipolar mode before operating the semiconductor device in an...
US-9,571,086 Bi-directional switch
A bi-directional switch that includes a first terminal, a second terminal, and a plurality of ballast circuits is provided. Each ballast circuit includes a...
US-9,571,085 High voltage driver
The invention concerns a high voltage driver comprising: first and second cascoded transistors (102, 104) adapted to generate an output signal (V.sub.OUT) based...
US-9,571,084 Controlled switches for fault tolerant power converters
Low-voltage outputs are provided by full-bridge rectification using controlled switches with fault detection monitoring of circuit conditions and disabling...
US-9,571,083 All-digital delay-locked loop tuning method with randomized LSB-tuning
In some example embodiments, there may be provided an apparatus. The apparatus may include a delay line including a plurality of cells; and tuning circuitry...
US-9,571,082 High resolution time-to-digital convertor
A circuit includes a time delta detector configured to receive an input clock signal and a reference clock signal and generate a delta pulse signal and a...
US-9,571,081 Strobe signal generation circuit and semiconductor apparatus using the same
A strobe signal generation circuit may include: a counter to generate a first source signal and a second source signal by counting an external strobe signal; a...
US-9,571,080 Delay-locked loop arrangement and method for operating a delay-locked loop circuit
Delay-locked loop arrangement comprising a steering unit and a delay-locked loop circuit. The steering unit is configured to generate a reference clock signal...
US-9,571,079 Integrated circuit and signal monitoring method thereof
An integrated circuit includes a signal generating unit, a signal monitoring unit and a processing unit. The signal generating unit is configured to generate a...
US-9,571,078 Modified flying adder architecture
According to an embodiment, an improved flying adder circuit, comprises a fine clock, a coarse pulse clock, a rising edge triggered output connected to both the...
US-9,571,077 Dynamic update technique for phase interpolator device and method therefor
A method and device for dynamically updating a phase interpolator circuit module using a phase update circuit module. The method can include interpolating a set...
US-9,571,076 Bidirectional delay circuit and integrated circuit including the same
A bidirectional delay circuit includes an input driving circuit and a delay switch circuit. The input driving circuit is connected between an input node and an...
US-9,571,075 Input voltage clamp with signal splitting and cross-over capabilities
An integrated circuit with input voltage clamping circuitry for receiving an input signal from external devices is provided. The input voltage clamping...
US-9,571,074 Efficient skew scheduling methodology for performance and low power of a clock-mesh implementation
According to one aspect, a method may include receiving a circuit model that includes a clock mesh that controls each of a plurality of logic circuits by...
US-9,571,073 3D clock distribution circuits and methods
An integrated circuit includes a clock source tier and at least two clock distribution tiers disposed in a vertical stack with the clock source tier. The clock...
US-9,571,072 Frequency multiplication circuit, electronic device and moving object
A frequency multiplication circuit includes a delay circuit that has a clock signal having a period input thereto and delays the signal by a time, an exclusive...
US-9,571,071 Frequency synthesizer circuit
The invention relates to frequency synthesizer circuits, and in particular to frequency synthesizer circuits characterized by a small channel spacing....
US-9,571,070 Clock circuit for a microprocessor
A mobile communication device includes an analog clock and a digital clock circuit. The analog clock circuit is configured to generate an oscillating output....
US-9,571,069 Implementing clock receiver with low jitter and enhanced duty cycle
A method and a clock receiver circuit for implementing low jitter and enhanced duty cycle, and a design structure on which the subject circuit resides are...
US-9,571,068 Power gating circuit and control method for power gating switch thereof
A power gating circuit and a control method for power gating switch thereof are provided. The power gating circuit includes a first switch, the power gating...
US-9,571,067 Semiconductor device with clock-based signal input circuit
A semiconductor device includes a signal input circuit suitable for synchronizing an input signal with a clock signal and receiving the clock signal as a power...
US-9,571,066 Digital filter circuit, digital filter processing method and digital filter processing program storage medium
Reduction of a circuit size and power consumption for performing digital filtering processing in a frequency domain is realized. The digital filter circuit...
US-9,571,065 Surface acoustic wave device having end-to-end combinable selectable electrode sub-elements
A described surface acoustic wave device includes a piezoelectric substrate and a configurable electrode assembly. The assembly includes: an array of N rows of...
US-9,571,064 Acoustic resonator device with at least one air-ring and frame
An acoustic resonator device includes a bottom electrode disposed on a substrate over an air cavity, a piezoelectric layer disposed on the bottom electrode, and...
US-9,571,063 Acoustic resonator device with structures having different apodized shapes
An acoustic resonator device includes a bottom electrode disposed on a substrate over an acoustic reflecting feature, a piezoelectric layer disposed on the...
US-9,571,062 Module
A module includes: a duplexer including an antenna terminal; a first wiring connecting the antenna terminal to an antenna; a second wiring coupled to the...
US-9,571,061 Integrated circuit configured with two or more single crystal acoustic resonator devices
A configurable single crystal acoustic resonator (SCAR) device integrated circuit. The circuit comprises a plurality of SCAR devices numbered from 1 through N,...
US-9,571,060 Transformer of the balanced-unbalanced type
A transformer of the balanced-unbalanced type includes a primary inductive circuit and a secondary inductive circuit housed inside an additional inductive...
US-9,571,059 Parallel via to improve the impedance match for embedded common mode filter design
A parallel via design is disclosed to improve the impedance match for embedded common mode choke filter designs. Particularly suited to such designs on...
US-9,571,058 Drive output harmonic mitigation devices and methods of use thereof
A filter for filtering a three-phase electrical power waveform produces a three-phase output power waveform. The filter has an inductor with three sets of first...
US-9,571,057 Altering audio signals
A system of altering an audio signal presented to a user may include an input configured to receive data indicating a status of an environment outside of an...
US-9,571,056 Power amplifier with self aligned peaking stage
RF PA circuitry includes an amplifier stage, gain compensation circuitry, and an adder. The amplifier stage is configured to receive and amplify an RF input...
US-9,571,055 Level adjustment device and method
A level of an input signal is detected according to a first following rate, and a first level signal indicating the detected level is generated. A level of the...
US-9,571,054 Systems and methods for dynamically adjusting volume based on media content
Systems and methods for dynamically adjusting a volume are provided. A presentation of a media asset is generated with a user equipment device at a first volume...
US-9,571,053 Receiver dynamic power management
A method of adjusting signal processing in a receiver based on signal strength includes determining a received signal strength indicator (RSSI) level, defining...
US-9,571,052 Transconductance (gm) boosting transistor arrangement
A circuit may increase input transconductance. An input stage may include a field effect transistor (FET) that has a gate, source, drain, and body terminal. An...
US-9,571,051 Reducing common mode transconductance in instrumentation amplifiers
An instrumentation amplifier (INA) that includes a first amplifier and a second amplifier coupled to the first amplifier. The first amplifier includes a first...
US-9,571,050 Implementing enhanced bias configuration for CMOS inverter based optical Transimpedance Amplifier
A method and circuit are provided for implementing an enhanced bias configuration for CMOS inverter based optical Transimpedance Amplifiers (TIAs). An...
US-9,571,049 Apparatus and methods for power amplifiers
Apparatus and methods for power amplifiers are disclosed. In one embodiment, a power amplifier circuit assembly includes a power amplifier and an impedance...
US-9,571,048 Differential power amplifier for mobile cellular envelope tracking
A differential power amplifier comprises an envelope tracking power supply configured to provide an envelope power supply signal to the differential power...
US-9,571,047 Switching regulator power supply with constant current option
A dual mode regulator provides power to a tower mounted low noise amplifier (LNA) and operates in either one of two modes. The dual mode regulator comprises a...
US-9,571,046 Amplifier circuit for a two-wire interface
The invention relates to an amplifier circuit (10a, 10b) for a two-wire interface, comprising a first current path (1), comprising a voltage-controlled current...
US-9,571,045 Implementing enhanced CMOS inverter based optical transimpedance amplifier
A method and circuit are provided for implementing enhanced CMOS inverter based optical Transimpedance Amplifiers (TIAs). A transimpedance amplifier (TIA)...
US-9,571,044 RF power transistors with impedance matching circuits, and methods of manufacture thereof
Embodiments of an RF amplifier include a transistor with a control terminal and first and second current carrying terminals, and a shunt circuit coupled between...
US-9,571,043 Auxiliary control of system offsets
An amplification system, circuit, and method of performing offset cancellation are described. The disclosed amplification system is described as including a...
US-9,571,042 Digital upconversion for multi-band multi-order power amplifiers
The present disclosure relates to digital up-conversion for a multi-band Multi-Order Power Amplifier (MOPA) that enables precise and accurate control of gain,...
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