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Optical output photodetector
An optical output photodetector includes a substrate having a semiconductor surface and at least one optical photodetector element on the semiconductor surface....
Solid-state imaging device and switching circuit
A solid-state imaging device includes: a photoelectric conversion unit which converts light into signal charges; an accumulation unit which accumulates the...
Solar-powered energy-autonomous silicon-on-insulator device
A solar-powered autonomous CMOS circuit structure is fabricated with monolithically integrated photovoltaic solar cells. The structure includes a device layer...
Semiconductor device and manufacturing method thereof
The semiconductor device includes a gate electrode over a substrate, a gate insulating layer over the gate electrode, an oxide semiconductor layer over the gate...
Flat panel display device with oxide thin film transistor and method of
fabricating the same
A flat panel display device with an oxide thin film transistor is disclosed which includes: an oxide semiconductor layer which has a width of a first length and...
Manufacturing method and manufacturing equipment of thin film transistor
A manufacturing method and a manufacturing equipment of a thin film transistor substrate are provided. In the manufacturing method, after forming a gate and a...
Display substrate and method of manufacturing the same
A display substrate includes a first switching element, an organic layer disposed on the first switching element, a capping layer disposed on the organic layer...
Liquid crystal display and manufacturing method thereof
A liquid crystal display includes a thin film transistor on a substrate, a pixel electrode connected to a first terminal of the thin film transistor, a roof...
Narrow bezel flat panel display
Provided is a flat panel display. A flat panel display includes: a lower panel defining a display area and a non-display area, a driver element and a line...
Thin film transistor array panel and manufacturing method of the same
A thin film transistor ("TFT") array panel includes; an insulation substrate, a TFT disposed on the insulation substrate and including a drain electrode, a...
Structure of crossing datalines and scanning lines and forming method in a
The array substrate comprises: data lines and scanning lines in an insulating crossing arrangement, where the data lines comprise first data lines and second...
Array substrate and manufacture method thereof
Embodiments of the disclosure provide an array substrate and a manufacture method thereof. The array substrate comprises a display region and a non-display...
Display device and manufacturing method thereof
A display device includes a substrate including a plurality of pixel areas, a thin film transistor disposed on the substrate, a color filter and a light...
Array substrate, manufacturing method thereof and display device
An array substrate, a manufacturing method thereof and a display device are disclosed. The manufacturing method of an array substrate including: forming...
Array substrate and manufacturing method thereof, and liquid crystal
The disclosed technology relates to an array substrate and a method of manufacturing the same, and a liquid crystal display. The array substrate comprises a...
Organic light emitting display device and method of manufacturing the same
Provided is an organic light emitting display device including: a substrate; a first anode and a second anode formed on the substrate; a first auxiliary...
A display device including an oxide semiconductor, a protective circuit and the like having appropriate structures and a small occupied area is necessary. The...
Active-matrix substrate and liquid-crystal display device
An active matrix substrate (100) includes: a gate electrode (12) formed on a substrate; an oxide semiconductor layer (16); a source electrode (14); a drain...
Semiconductor device with three or four-terminal-FinFET
Semiconductor devices and fabrication methods for simultaneously forming a 3T-FinFET and a 4T-FinFET on a same substrate are provided. A first fin and a second...
High voltage three-dimensional devices having dielectric liners
High voltage three-dimensional devices having dielectric liners and methods of forming high voltage three-dimensional devices having dielectric liners are...
Structure and method to form passive devices in ETSOI process flow
Techniques for fabricating passive devices in an extremely-thin silicon-on-insulator (ETSOI) wafer are provided. In one aspect, a method for fabricating one or...
Dual STI integrated circuit including FDSOI transistors and method for
manufacturing the same
An integrated circuit, including: a first cell, including: FDSOI transistors; a UTBOX layer lying beneath the transistors; a first well lying beneath the...
Method for manufacturing semiconductor device
According to one embodiment, a method for manufacturing a semiconductor device includes forming a first metal nitride film on a side surface of a hole extending...
Multilevel memory stack structure with joint electrode having a collar
portion and methods for manufacturing...
A three-dimensional memory device including multiple stack structures can be formed with a joint region electrode, which is an electrode formed at a joint...
Electronic device and method for manufacturing the same
A method for manufacturing an electronic device includes forming a first source layer including a trench, forming a first sacrificial layer in the trench,...
Method for manufacturing semiconductor memory device
According to one embodiment, a method for manufacturing a semiconductor memory device includes forming a stacked body including a plurality of first layers and...
Spacer passivation for high-aspect ratio opening film removal and cleaning
A method of making a semiconductor device includes forming a stack of alternating layers of a first material and a second material over a substrate, etching the...
Vertical gate NAND memory devices
In an example, a device comprises a vertical stack of memory cells. Each memory cell of the vertical stack may include more than one memory element. A first...
Gate fringing effect based channel formation for semiconductor device
Methods and structures for forming semiconductor channels based on gate fringing effect are disclosed. In one embodiment, a NAND flash memory device comprises...
Method to control the common drain of a pair of control gates and to
improve inter-layer dielectric (ILD)...
A semiconductor structure for a split gate flash memory cell device with a hard mask having an asymmetric profile is provided. A semiconductor substrate of the...
Semiconductor integrated device including capacitor and memory cell and
method of forming the same
A semiconductor integrated device and a method of forming the same, the semiconductor integrated device includes a substrate, at least one shallow trench...
Metal word lines for three dimensional memory devices
A method of making a monolithic three dimensional NAND string including forming a stack of alternating layers of insulating first material and sacrificial...
Structure with emedded EFS3 and FinFET device
The present disclosure relates to an integrated chip having a FinFET device and an embedded flash memory device, and a method of formation. In some embodiments,...
Various embodiments provide memory devices and methods for forming the same. A substrate is provided, the substrate having one or more adjacent memory cells...
A flash memory fabrication method includes: providing a substrate having a plurality of floating gate structures separated by trenches, which includes at least...
Method to form semiconductor devices
A method of forming semiconductor devices. First, a substrate is provided, and a first implant area and a second implant area are defined in a mask pattern....
Hybrid logic and SRAM contacts
The method includes forming a first opening in a dielectric layer exposing a source drain region of an SRAM device and forming a second opening in the...
Metal strap for DRAM/FinFET combination
A metal strap is formed in a middle-of-line (MOL) process for communication between an eDRAM and a FinFET. An oxide is deposited in a trench over the eDRAM to...
Semiconductor device and method for manufacturing the same
A method for manufacturing a semiconductor device includes forming a storage node hole passing through an upper support layer, a bowing prevention layer and an...
Semiconductor device and production method therefor
One semiconductor device includes first to third gate electrodes arranged inside a first active region and embedded in first to third trenches extending in a...
A semiconductor device includes a plurality of semiconductor devices, a plurality of metal lines electrically connected to at least one of the semiconductor...
A semiconductor device having a novel structure is provided. The semiconductor device includes a first p-type transistor, a second n-type transistor, a third...
CMOS transistors with identical active semiconductor region shapes
A disposable semiconductor material is deposited to form disposable semiconductor material portions on semiconductor fins. A first dielectric liner is deposited...
Field effect transistor including strained germanium fins
In one example, a device includes a p-type field effect transistor region and n-type field effect transistor region. The p-type field effect transistor region...
Applying channel stress to Fin field-effect transistors (FETs) (FinFETs)
using a self-aligned single diffusion...
Aspects for applying channel stress to Fin field-effect transistors (FETs) (FinFETs) using a self-aligned single diffusion break (SDB) isolation structure are...
Semiconductor device with thermally grown oxide layer between field and
gate electrode and method of manufacturing
A first trench and a second trench, both extending from a main surface into a semiconductor layer, are filled with a first fill material. The first fill...
Semiconductor device and driver circuit with an active device and
isolation structure interconnected through a...
Embodiments of semiconductor devices and driver circuits include a semiconductor substrate having a first conductivity type, an isolation structure (including a...
Semiconductor device and semiconductor package
A semiconductor device includes a first semiconductor region of a first conductive type, a second semiconductor region of a second conductive type, a first...
Avalanche-rugged quasi-vertical HEMT
A semiconductor device includes a semiconductor body including first and second lateral surfaces. A first device region includes a drift region of a first...
Semiconductor die, integrated circuits and driver circuits, and methods of
maufacturing the same
A semiconductor die is disclosed comprising a lateral semiconductor device on an upper major surface of a substrate, the integrated circuit comprising a silicon...