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The present invention provides a semiconductor device that prevents destruction due to an avalanche breakdown and that has a high tolerance against breakdown by...
Surge protection element and semiconductor device
A semiconductor element is provided which does not break down by avalanche current. A surge protection element includes: a semiconductor multi-layer comprising...
Semiconductor device and fabricating method thereof
Provided are a semiconductor device and a fabricating method thereof. The fabricating method includes forming first to fourth fins, each extending in a first...
Semiconductor device and method for manufacturing a semiconductor device
A semiconductor device includes a semiconductor substrate including a main surface with a polygonal geometry and a main electric circuit manufactured within a...
Semiconductor device with inverters having transistors formed in different
A semiconductor device has a first and second transistors formed on an active region defined by an insulating region. The active region is divided into a first...
Semiconductor wafer for integrated packages
An embodiment semiconductor wafer includes a bottom semiconductor layer having a first doping concentration, a middle semiconductor layer over the bottom...
Articles including bonded metal structures and methods of preparing the
Articles including bonded metal structures and methods of preparing the same are provided herein. In an embodiment, a method of preparing an article that...
Methods of fabrication and testing of three-dimensional stacked integrated
The present invention provides a method of fabricating a 3D stacked IC SiP which includes: providing a first semiconductor wafer having a plurality of first...
Tiled hybrid array and method of forming
A tiled array of hybrid assemblies and a method of forming such an array enables the assemblies to be placed close together. Each assembly comprises first and...
Method for integrating a light emitting device
Light emitting devices and methods of integrating micro LED devices into light emitting device are described. In an embodiment a light emitting device includes...
Semiconductor light-emitting device having matrix-arranged light-emitting
elements and transparent plates
A semiconductor light-emitting device includes a support body multiple, multiple light-emitting elements arranged in a matrix on the support body, a transparent...
Display comprising ultra-small LEDs and method for manufacturing same
Provided are a display including a nano-scale LED and a method for manufacturing the same. In detail, nano-scale LED devices, each of which has a nano unit, are...
Light source module and manufacturing method thereof, and backlight unit
A light source module includes a circuit board, light emitting diode chips mounted on the circuit board by flip-chip bonding or a surface mounting technology...
Semiconductor package and method of manufacturing the semiconductor
Embodiments of the inventive concept include a semiconductor package having a plurality of stacked semiconductor chips. A multi-layered substrate includes a...
Semiconductor TSV device package for circuit board connection
An electronic device includes a circuit board and a semiconductor device package. The semiconductor device package includes a laminate layer. The semiconductor...
Stacking of multiple dies for forming three dimensional integrated circuit
The embodiments described provide methods and structures for forming support structures between dies and substrate(s) of a three dimensional integrated circuit...
Wireless communicating among vertically arranged integrated circuits (ICs)
in a semiconductor package
Methods and apparatus are disclosed for wirelessly communicating among integrated circuits and/or functional modules within the integrated circuits. A...
Method of thinning and packaging a semiconductor chip
A semiconductor wafer and a plurality of semiconductor dies are provided. The wafer and the dies each include first electrically conductive terminals arranged...
Structure and method for package warpage control using dummy interconnects
Presented herein is a package comprising a molding compound layer and an active device in the molding compound layer. A conductive via passes through the...
Chip bonding apparatus and chip bonding method
The chip bonding apparatus used in a chip bonding method includes a heating unit for heating an anisotropic conductive film at a first temperature; an...
Stacked packaging improvements
A plurality of microelectronic assemblies are made by severing an in-process unit including an upper substrate and lower substrate with microelectronic elements...
Chip packaging method and chip package using hydrophobic surface
A chip packaging method using a hydrophobic surface includes forming superhydrophobic surfaces forming hydrophilic surfaces on predetermined positions of the...
Semiconductor device and method of manufacturing the semiconductor device
According to one embodiment, a first electrode is formed on a first face of a first semiconductor chip, and a second electrode and a protrusion are formed on a...
Packages with solder ball revealed through laser
An integrated circuit structure includes a substrate, a PPI over the substrate, a solder region over and electrically coupled to a portion of the PPI, and a...
A semiconductor device includes a first metal wiring formed on a semiconductor substrate, a first organic insulating film formed on the first metal wiring, and...
Pad structure of a semiconductor device, method of manufacturing the pad
structure and semiconductor package...
A pad structure usable with a semiconductor device may include an insulating layer pattern structure, a plug, and a pad. The insulating layer pattern structure...
Methods of forming connector pad structures, interconnect structures, and
Methods of forming connector pad structures, interconnect structures, and structures thereof are disclosed. In some embodiments, a method of forming a connector...
Semiconductor device and method of manufacturing the same
A semiconductor device includes: a first interconnection line and a second interconnection line which extend apart from each other on a first plane at a first...
Resin-sealed semiconductor device and method of manufacturing resin-sealed
A resin-sealed semiconductor device 10 of the present invention includes: a mesa-type semiconductor element 100 which includes a mesa-type semiconductor base...
Method for manufacturing semiconductor device and semiconductor device
A method for manufacturing a semiconductor device includes: a fixing step in which semiconductor chips are mounted on and fixed to predetermined positions on an...
Wafer level fan-out with electromagnetic shielding
The present disclosure integrates electromagnetic shielding into a wafer level fan-out packaging process. First, a mold wafer having multiple modules is...
Semiconductor device and method for manufacturing same
One semiconductor device includes a wiring substrate, a semiconductor chip layered on one face of the wiring substrate and having a first face facing the wiring...
Flexible Crss adjustment in a SGT MOSFET to smooth waveforms and to avoid
EMI in DC-DC application
A semiconductor power device comprises a plurality of power transistor cells each having a trenched gate disposed in a gate trench wherein the trenched gate...
Secure chip with physically unclonable function
A first trench having a first aspect ratio and a second trench having a second aspect ratio that is greater than the first trench are provided into a material...
Alignment key of semiconductor device and method of fabricating the same
An alignment key of a semiconductor device includes: a material layer formed at a scribe region of a semiconductor substrate, a first dummy hole and a second...
Packaged semiconductor devices, methods of packaging semiconductor
devices, and PoP devices
Packaged semiconductor devices, methods of packaging semiconductor devices, and package-on-package (PoP) devices are disclosed. In some embodiments, a method of...
Provided is semiconductor package, including a semiconductor chip; an upper structure over the semiconductor chip, the upper structure having a first thermal...
Semiconductor package assembly with through silicon via interconnect
The invention provides a semiconductor package assembly with a TSV interconnect. The semiconductor package assembly includes a first semiconductor die mounted...
Chip package and method for forming the same
An embodiment of the invention provides a chip package which includes: a first substrate; a second substrate disposed thereon, wherein the second substrate...
Local interconnect structure including non-eroded contact via trenches
A local interconnect structure includes a substrate having a dielectric layer and at least one semiconductor contact structure embedded in the dielectric layer....
Method of forming a damascene interconnect on a barrier layer
A semiconductor device includes a first metal layer provided above a semiconductor substrate, an interlayer insulating film provided above the first metal...
Semiconductor device having buried power rail
A semiconductor device includes: a substrate; a power rail on the substrate; an active layer on the substrate and at same layer as the power rail; and a contact...
Formation of IC structure with pair of unitary metal fins
Embodiments of the present disclosure may provide methods of forming an IC structure with a pair of metal fins. An IC structure with a pair of metal fins can...
Nonvolatile memory device and method for fabricating the same
A nonvolatile memory device may include a stair-shaped structure including a first interlayer dielectric layer and a memory cell repeatedly stacked. The...
Memory device and method for manufacturing the same
According to one embodiment, a memory device includes a conductive member and a stacked body provided on the conductive member. The stacked body includes a...
Semiconductor device and method for manufacturing the same
A semiconductor device and a method for manufacturing the same are disclosed. A semiconductor device includes a contact hole formed over a semiconductor...
Semiconductor device with integrated hot plate and recessed substrate and
method of production
The semiconductor device comprises a substrate of semiconductor material, a dielectric layer on the substrate, an electrically conductive contact pad arranged...
An interconnect structure includes a dielectric layer with one or more trenches extending therein, one or more interconnect lines, and one or more first liner...
FinFET power supply decoupling
Embodiments herein describe dummy gates disposed over a portion of a fin in finFETs. That is, instead of separating the dummy gates from the finFET structure,...
Three-dimensional integrated circuit systems in a package and methods
A method for making a packaged semiconductor device includes dispensing a first adhesive into a first cavity of a substrate having a first major surface and a...