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Patent # Description
US-9,570,335 Dicing film
According to the invention, a dicing film, which generates a small amount of scrapes and beard-like burrs during dicing and furthermore has desirable strength...
US-9,570,334 Method and system for positioning wafer in semiconductor manufacturing fabrication
A method for positioning a wafer in semiconductor fabrication is provided. The method includes sending a wafer into a processing chamber by a transferring...
US-9,570,333 Substrate treating apparatus
A substrate treating apparatus includes a pod storage unit 9 between a substrate treating unit 11 and a pod storage and transport unit 7, with a transport robot...
US-9,570,332 Regulation jig and a display substrate conveyer using the same
The invention discloses a regulation jig including a regulation part and a scale plate which are movably connected. The regulation part can simultaneously...
US-9,570,331 Wafer cassette with electrostatic carrier charging scheme
A wafer cassette includes a main body having space to hold at least one wafer assembly. Each of the at least one wafer assembly includes a wafer and an...
US-9,570,330 Substrate processing apparatus
A substrate processing apparatus is presented having a transport chamber defining substantially linear substrate transport paths, a linear array of substrate...
US-9,570,329 Peeling apparatus and manufacturing apparatus of semiconductor device
To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the...
US-9,570,328 Substrate support for use with multi-zonal heating sources
Apparatus for use with multi-zonal heating sources are provided. In some embodiments, a substrate support may have a pocket disposed in a surface of the...
US-9,570,327 Substrate liquid treatment apparatus and substrate liquid treatment method
A substrate liquid treatment apparatus comprises a chuck (13) that holds and rotates a wafer, a back surface purging nozzle (15) that discharges a purge gas...
US-9,570,326 Substrate cleaning method, substrate cleaning apparatus, and computer-readable storage medium
A substrate cleaning method includes: a first step in which a cleaning liquid is ejected from a nozzle N2 to a central portion of a wafer W; a second step in...
US-9,570,325 Packaged semiconductor devices having ribbon wires
A packaged semiconductor device, such as a power QFN device, has (rectangular) ribbon wires, instead of circular bond wires. A proximal end of each ribbon wire...
US-9,570,324 Method of manufacturing package system
A method of manufacturing a package system includes forming a first interconnect structure over a first surface of a first substrate, forming at least one first...
US-9,570,323 Semiconductor device leadframe
For so called film assisted moulding (FAM) device processing techniques there is provided lead frame for a semiconductor device, comprising a base portion and a...
US-9,570,322 Integrated circuit packages and methods of forming same
Packages and methods of manufacture thereof are described. A package may include a first package and a die structure disposed over the first package. The first...
US-9,570,321 Use of an external getter to reduce package pressure
A system and method for forming a wafer level package. In one example, a substrate used in the wafer level package includes a surface defined by a wafer level...
US-9,570,320 Method to etch copper barrier film
A method of opening a barrier film below copper structures in a stack is provided. A pulsed gas is provided into a plasma processing chamber, wherein the...
US-9,570,319 Method of manufacturing a semiconductor device
Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a method of manufacturing a semiconductor device includes:...
US-9,570,318 High-k and p-type work function metal first fabrication process having improved annealing process flows
Embodiments are directed to a method of forming portions of a fin-type field effect transistor (FinFET). The method includes forming at least one fin, and...
US-9,570,317 Microelectronic method for etching a layer
A microelectronic method for etching a layer to be etched, including: modifying the layer to be etched from a surface of the layer to be etched and over a depth...
US-9,570,316 Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes forming a first conductive structure on a substrate, forming an insulation layer on a sidewall of the...
US-9,570,315 Method of interfacial oxide layer formation in semiconductor device
A method of an interfacial oxide layer formation comprises a plurality of steps. The step (S1) is to remove a native oxide layer from a surface of a substrate;...
US-9,570,314 Methods for singulating semiconductor wafer
Methods for dicing a wafer is presented. The method includes providing a wafer having first and second major surfaces. The wafer is prepared with a plurality of...
US-9,570,313 Method for etching high-K dielectric using pulsed bias power
A method of patterning a gate stack on a substrate is described. The method includes preparing a gate stack on a substrate, wherein the gate stack includes a...
US-9,570,312 Plasma etching method
Provided is a plasma etching method capable of favorably forming masks used when etching a multilayer film. This plasma etching method for etching boron-doped...
US-9,570,311 Modular grinding apparatuses and methods for wafer thinning
Methods of thinning a plurality of semiconductor wafers and apparatuses for carrying out the same are disclosed. A grinding module within a set of grinding...
US-9,570,310 Method for manufacturing semiconductor device
The number of masks and photolithography processes used in a manufacturing process of a semiconductor device are reduced. A first conductive film is formed over...
US-9,570,309 Mask alignment system for semiconductor processing
A mask alignment system for providing precise and repeatable alignment between ion implantation masks and workpieces. The system includes a mask frame having a...
US-9,570,308 Method of forming regions with hot and cold implants
A method for fabricating a semiconductor device includes: implanting a first species into a substrate at a cold temperature to form a first region; and...
US-9,570,307 Methods of doping substrates with ALD
Provided are methods of doping substrates and making doped semiconductor features. An exemplary method includes providing a substrate having at least one...
US-9,570,306 Surface treatment method for single crystal SiC substrate, and single crystal SiC substrate
The present application aims to provide a surface treatment method that is able to accurately control the rate of etching a single crystal SiC substrate and...
US-9,570,305 Self-aligned double patterning
A system and method for a semiconductor device are provided. An embodiment comprises a dielectric layer and masking layers over the dielectric layer. A thin...
US-9,570,304 Method of forming fine patterns in an anti-reflection layer for use as a patterning hard mask
Provided is a method of fabricating a semiconductor device. The method includes forming an anti-reflection layer on a lower layer, forming photoresist patterns...
US-9,570,303 Conformal amorphous carbon for spacer and spacer protection applications
A method of forming a nitrogen-doped amorphous carbon layer on a substrate in a processing chamber is provided. The method generally includes depositing a...
US-9,570,302 Method of patterning a material layer
A method of fabricating a semiconductor device is disclosed. The method includes forming a radiation-removable-material (RRM) layer over a substrate and...
US-9,570,301 Projection patterning with exposure mask
A process for fabricating an integrated circuit is provided. The process includes providing a substrate and forming a hard mask on the substrate. The hard mask...
US-9,570,300 Strain relaxed buffer layers with virtually defect free regions
A strain relaxed buffer layer of a second semiconductor material and of a second lattice constant and containing misfit dislocation defects and threading...
US-9,570,299 Formation of SiGe nanotubes
Techniques for forming nanostructured materials are provided. In one aspect of the invention, a method for forming nanotubes on a buried insulator includes the...
US-9,570,298 Localized elastic strain relaxed buffer
A strain relaxed buffer layer is fabricated by melting an underlying layer beneath a strained semiconductor layer, which allows the strained semiconductor layer...
US-9,570,297 Elimination of defects in long aspect ratio trapping trench structures
A method of forming a semiconductor in a long trench. The method may include; forming a first semiconductor on a substrate and in a long trench; forming a first...
US-9,570,296 Preparation of low defect density of III-V on Si for device fabrication
A method of forming a semiconducting material includes depositing a graded buffer on a substrate to form a graded layer of an indium (In) containing III-V...
US-9,570,295 Protective capping layer for spalled gallium nitride
Described herein is a method for manufacturing a stack of semiconductor materials in which a growth substrate is separated from the stack after a semiconductor...
US-9,570,294 Preparation method of graphene nanoribbon on h-BN
A preparation method of a graphene nanoribbon on h-BN, comprising: 1) forming a h-BN groove template with a nano ribbon-shaped groove structure on the h-BN by...
US-9,570,293 Method for making epitaxial base
A method for making an epitaxial base includes the following steps. A plurality of grooves and a plurality of bulges are formed on an epitaxial growth surface...
US-9,570,292 Method for making an epitaxial structure with carbon nanotube layer
A method for making an epitaxial structure includes the following steps. A substrate having an epitaxial growth surface is provided. A buffer layer is formed on...
US-9,570,291 Semiconductor substrates and methods for processing semiconductor substrates
Semiconductor substrates and methods for processing semiconductor substrates are provided. A method for processing a semiconductor substrate includes providing...
US-9,570,290 Plasma assisted atomic layer deposition titanium oxide for conformal encapsulation and gapfill applications
The embodiments herein relate to methods and apparatus for depositing an encapsulation layer over memory stacks in MRAM and PCRAM applications. The...
US-9,570,289 Method and apparatus to minimize seam effect during TEOS oxide film deposition
A method of minimizing a seam effect of a deposited TEOS oxide film during a trench filling process performed on a semiconductor substrate in a semiconductor...
US-9,570,288 Method to fabricate FinFET sensors, in particular, FinFET sensors for ionic, chemical and biological...
The present invention relates to a method of producing a FinFET sensor device comprising the steps of: providing a silicon substrate; etching the silicon...
US-9,570,287 Flowable film curing penetration depth improvement and stress tuning
Methods for depositing and curing a flowable dielectric layer are disclosed herein. Methods can include forming a flowable dielectric layer, immersing the...
US-9,570,286 Supercritical drying method for semiconductor substrate
According to one embodiment, a supercritical drying method for a semiconductor substrate comprises introducing a semiconductor substrate, a surface of the...
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